#ifndef _SND_SOC_PCM1863 #define _SND_SOC_PCM1863 #include #include //Register Addresses #define PCM1863_ADC1_INPUT_SEL_L 0x06 #define PCM1863_ADC1_INPUT_SEL_R 0x07 #define PCM1863_FMT_REG 0x0B #define PCM1863_CLK_SRC 0x20 #define PCM1863_SCK_DIV 0x26 #define PCM1863_POWER 0x70 #define PCM1863_FLT_MUTE 0x71 #define PCM1863_FS_CUR 0x73 #define PCM1863_STAT 0x75 //ADC INPUT Reg Left (6/0x06) #define PCM1863_SEL_L (1 << 0) #define PCM1863_SEL_L_SHIFT 0 #define PCM1863_SEL_L_VIN4 (8 << 0) //ADC INPUT Reg Right (7/0x07) #define PCM1863_SEL_R (1 << 0) #define PCM1863_SEL_R_SHIFT 0 #define PCM1863_SEL_R_VIN4 (8 << 0) //Format Register (11/0x0B) #define PCM1863_RX_WLEN (1 << 6) #define PCM1863_RX_WLEN_SHIFT 6 #define PCM1863_RX_WLEN_24 (1 << 6) #define PCM1863_RX_WLEN_20 (2 << 6) #define PCM1863_RX_WLEN_16 (3 << 6) #define PCM1863_TX_WLEN (1 << 2) #define PCM1863_TX_WLEN_SHIFT 2 #define PCM1863_TX_WLEN_24 (1 << 2) #define PCM1863_TX_WLEN_20 (2 << 2) #define PCM1863_TX_WLEN_16 (3 << 2) #define PCM1863_FMT (0 << 0) #define PCM1863_FMT_SHIFT 0 #define PCM1863_FMT_I2S (0 << 0) #define PCM1863_FMT_LTJ (1 << 0) #define PCM1863_FMT_RTJ (2 << 0) // Clock Source Register (32/0x20) #define PCM1863_CLKDET_EN (1 << 0) #define PCM1863_CLKDET_EN_SHIFT 0 #define PCM1863_CLKDET_EN_ENABLE (1 << 0) #define PCM1863_CLKDET_EN_DISABLE (0 << 0) #define PCM1863_ADC_CLK_SRC (0 << 3) #define PCM1863_ADC_CLK_SRC_SHIFT 3 #define PCM1863_ADC_CLK_SRC_SCK (0 << 3) #define PCM1863_ADC_CLK_SRC_PLL (1 << 3) #define PCM1863_MST_MODE (0 << 4) #define PCM1863_MST_MODE_SHIFT 4 #define PCM1863_MST_MODE_SLAVE (0 << 4) #define PCM1863_MST_MODE_MASTER (1 << 4) #define PCM1863_MST_SCK_SRC (0 << 5) #define PCM1863_MST_SCK_SRC_SHIFT 5 #define PCM1863_MST_SCK_SRC_SCK_XI (0 << 5) #define PCM1863_MST_SCK_SRC_BCK (1 << 5) #define PCM1863_SCK_XI_SEL (0 << 6) #define PCM1863_SCK_XI_SEL_SHIFT 6 #define PCM1863_SCK_XI_SEL_SCK_XTAL (0 << 6) #define PCM1863_SCK_XI_SEL_SCK (1 << 6) #define PCM1863_SCK_XI_SEL_XTAL (2 << 6) //SCK Divider Register (38/0x26) #define PCM1863_DIV_NUM (7 << 0) #define PCM1863_DIV_NUM_SHIFT 0 #define PCM1863_DIV_NUM_18 (7 << 0) #define PCM1863_DIV_NUM_14 (3 << 0) #define PCM1863_DIV_NUM_12 (1 << 0) //Power Register (112/0x70) #define PCM1863_STANDBY (0 << 0) #define PCM1863_STANDBY_SHIFT 0 #define PCM1863_STANDBY_RUN (0 << 0) #define PCM1863_STANDBY_STANDBY (1 << 0) //Sound Control Register (113/0x71) #define PCM1863_MUTE_CH1_L (0 << 0) #define PCM1863_MUTE_CH1_L_SHIFT 0 #define PCM1863_MUTE_CH1_L_UNMUTE (0 << 0) #define PCM1863_MUTE_CH1_L_MUTE (1 << 0) #define PCM1863_MUTE_CH1_R (0 << 1) #define PCM1863_MUTE_CH1_R_SHIFT 1 #define PCM1863_MUTE_CH1_R_UNMUTE (0 << 1) #define PCM1863_MUTE_CH1_R_MUTE (1 << 1) #define PCM1863_MUTE_CH2_L (0 << 2) #define PCM1863_MUTE_CH2_L_SHIFT 2 #define PCM1863_MUTE_CH2_L_UNMUTE (0 << 2) #define PCM1863_MUTE_CH2_L_MUTE (1 << 2) #define PCM1863_MUTE_CH2_R (0 << 3) #define PCM1863_MUTE_CH2_R_SHIFT 3 #define PCM1863_MUTE_CH2_R_UNMUTE (0 << 3) #define PCM1863_MUTE_CH2_R_MUTE (1 << 3) #define PCM1863_HPF_EN (1 << 4) #define PCM1863_HPF_EN_SHIFT 4 #define PCM1863_HPF_EN_ENABLE (1 << 4) #define PCM1863_HPF_EN_DISBALE (0 << 4) extern const struct regmap_config pcm1863_regmap; int pcm1863_probe(struct device *dev, struct regmap *regmap); void pcm1863_remove(struct device *dev); #endif