On Wed, Oct 02, 2024 at 03:20:13AM GMT, Alexey Klimov wrote:
Add the Low Power Audio SubSystem Low Power Island (LPASS LPI) pin controller device node required for audio subsystem on Qualcomm QRB4210 RB2.
Signed-off-by: Alexey Klimov alexey.klimov@linaro.org
arch/arm64/boot/dts/qcom/sm4250.dtsi | 16 ++++++++++++++++ 1 file changed, 16 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sm4250.dtsi b/arch/arm64/boot/dts/qcom/sm4250.dtsi index c5add8f44fc0..37c0e963e739 100644 --- a/arch/arm64/boot/dts/qcom/sm4250.dtsi +++ b/arch/arm64/boot/dts/qcom/sm4250.dtsi @@ -3,6 +3,7 @@
- Copyright (c) 2021, Iskren Chernev iskren.chernev@gmail.com
*/
+#include <dt-bindings/sound/qcom,q6dsp-lpass-ports.h> #include "sm6115.dtsi"
&CPU0 { @@ -36,3 +37,18 @@ &CPU6 { &CPU7 { compatible = "qcom,kryo240"; };
+&soc {
- lpass_tlmm: pinctrl@a7c0000 {
Please add the node to sm6115.dtsi and override the compat string here.
compatible = "qcom,sm4250-lpass-lpi-pinctrl";reg = <0x0 0xa7c0000 0x0 0x20000>,<0x0 0xa950000 0x0 0x10000>;
Please pad address to 8 hex digits: reg = <0x0 0x0a7c0000 0x0 0x20000>
clocks = <&q6afecc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>;clock-names = "audio";gpio-controller;#gpio-cells = <2>;gpio-ranges = <&lpass_tlmm 0 0 26>;- };
+};
2.45.2