On Thu, Mar 15, 2012 at 2:40 AM, Lars-Peter Clausen lars@metafoo.de wrote:
If this is for all registers, how does stuff like DAPM work, which uses the framework internal update_bits function?
If it's the case that the write address is always read address + 1 you can still use the framework if you set write_flag_mask to 0x01 in your regmap config. In my opinion it even makes sense to shift all the register numbers to the left by one and use a 7/9 instead of a 8/8 addr/reg layout. This will reduce the amount of memory wasted due to holes in the register cache.
Thank you for your information. I've just been investigating these. I also found ASoC core access i2c driver via snd_soc_update_bits or others. As a result, write register address is the same as read's.
I'll try to implement these.
BTW, currently, by settting ML26124 codec with fixed value, I've confirmed both playback and capture work well.
thanks