>This is doubtful. Here we see the behavior of the PCI controller, and
>there shouldn't be difference by CPU instructions.
>The difference in the code between azx_reset() and your code are:
>- Use of azx_writeb() and azx_writel()
>- Limited loop time for GCTL_RESET bit check
I tried both things. It did not work. So, I tried adding a delay between while loop and reset writel in my code. A few experiments with it shows that delay between reset state and on state determines codec detection. Only a delay of less than 100 uSec results in successful codec detection. Here is table of my observations:
usleep result 5-10 ok 50-100 ok 75-100 ok 75-150 fail 100-200 fail 250-500 fail 500-1000 fail
Since link_reset_enter and exit have a lot of code in between (atleast greater than 100us) it always results in failure.