5 Mar
2013
5 Mar
'13
3:42 a.m.
On Mon, Mar 04, 2013 at 05:10:20PM -0700, Stephen Warren wrote:
From: Stephen Warren swarren@nvidia.com
This register field is 11 bits wide, not 15 bits wide. Given the way this value is currently, used, this patch has no practical effect. However, it's still best if the value is correct.
Applied, thanks.