On Tue, 2010-03-02 at 15:06 +0100, ext Jarkko Nikula wrote:
On Tue, 02 Mar 2010 15:52:00 +0200 Eero Nurkkala ext-eero.nurkkala@nokia.com wrote:
Reading the XBUFFSTAT register is by no means accurate. IIRC, it reports the buffer status incorrectly about 1/50 times on average (@ 48000khz); with simple math, it may be read during the DMA burst. Or is it guaranteed not being read during DMA transfer / have you otherwise verified the behavior?
Do you remember how big was this variation? Was it near the burst size or some arbitrary difference?
Mostly the samples were good (49/50, @48khz, 2 channels, value polled from userpace), but the remaining 1/50 were garbage - and actually matched the probability of a simultaneous DMA burst. So the problem is - if you read at time t0, and the DMA burst is taking place at the same time - you get a value that looks rather random, as when (if) you poll the position @ t0 + n uS, the value is (after some usecs) a lot different. Or maybe the XBUFFSTAT just isn't reliable at all (regardless of DMA bursts etc).
It's easy to check - at DMA IRQ, read out the XBUFFSTAT... if the range is not valid, print a message...(to rule out the DMA bursts).
- Eero