Hi David,
2012/6/7 David Henningsson david.henningsson@canonical.com:
On 06/06/2012 04:02 PM, Wang Xingchao wrote:
if EPSS supported, transition from D3 state to D0 state in less than 10ms
Signed-off-by: Wang Xingchaoxingchao.wang@intel.com
sound/pci/hda/hda_codec.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/sound/pci/hda/hda_codec.c b/sound/pci/hda/hda_codec.c index b89c8ec..5298ba1 100644 --- a/sound/pci/hda/hda_codec.c +++ b/sound/pci/hda/hda_codec.c @@ -3526,14 +3526,18 @@ static bool snd_hda_codec_get_supported_ps(struct hda_codec *codec, hda_nid_t fg static void hda_set_power_state(struct hda_codec *codec, hda_nid_t fg, unsigned int power_state) {
- bool epss;
if (codec->patch_ops.set_power_state) { codec->patch_ops.set_power_state(codec, fg, power_state); return; }
- epss = snd_hda_codec_get_supported_ps(codec, fg, AC_PWRST_EPSS);
/* this delay seems necessary to avoid click noise at power-down */
- if (power_state == AC_PWRST_D3)
- if ((power_state == AC_PWRST_D3)&& !epss)
msleep(100);
- else
- msleep(10);
Hi Wang,
You seem to have increased the delay from 0 to 10 ms on all cases when power_state != AC_PWRST_D3, is this intentional?
Thanks for clarification, it's a mistake here. Only transition from D0 to D3 need the delay to avoid click noise, there's no limitation during power up. i will update the patch based on your suggestion.
thanks --xingchao
Or did you mean to write like this:
if (power_state == AC_PWRST_D3) { bool epss = snd_hda_codec_get_supported_ps(codec, fg, AC_PWRST_EPSS); msleep(epss ? 10 : 100); }
-- David Henningsson, Canonical Ltd. https://launchpad.net/~diwic