Add module parameter so that the different modes can be quickly tested.
Signed-off-by: Pierre-Louis Bossart pierre-louis.bossart@linux.intel.com --- sound/soc/sof/intel/hda.c | 11 +++++++++++ 1 file changed, 11 insertions(+)
diff --git a/sound/soc/sof/intel/hda.c b/sound/soc/sof/intel/hda.c index f7e5371789f2..32b02d3b6536 100644 --- a/sound/soc/sof/intel/hda.c +++ b/sound/soc/sof/intel/hda.c @@ -40,6 +40,16 @@
#if IS_ENABLED(CONFIG_SND_SOC_SOF_INTEL_SOUNDWIRE)
+/* + * The default for SoundWire clock stop quirks is to power gate the IP + * and do a Bus Reset, this will need to be modified when the DSP + * needs to remain in D0i3 so that the Master does not lose context + * and enumeration is not required on clock restart + */ +static int sdw_clock_stop_quirks = SDW_INTEL_CLK_STOP_BUS_RESET; +module_param(sdw_clock_stop_quirks, int, 0444); +MODULE_PARM_DESC(sdw_clock_stop_quirks, "SOF SoundWire clock stop quirks"); + static int sdw_params_stream(struct device *dev, struct sdw_intel_stream_params_data *params_data) { @@ -149,6 +159,7 @@ static int hda_sdw_probe(struct snd_sof_dev *sdev) res.parent = sdev->dev; res.ops = &sdw_callback; res.dev = sdev->dev; + res.clock_stop_quirks = sdw_clock_stop_quirks;
/* * ops and arg fields are not populated for now,