On 11.01.2018 07:43, Nicolin Chen wrote:
Checking TE and RE bits in SCR register doesn't work for AC97 mode which enables SSIEN, TE and RE in the fsl_ssi_setup_ac97() that's called during probe().
So when running into the trigger(), it will always get the result of both TE and RE being enabled already, even if actually there is no active stream.
This patch fixes this issue by adding a variable to log the active streams manually.
Signed-off-by: Nicolin Chen nicoleotsuka@gmail.com Tested-by: Caleb Crome caleb@crome.org
sound/soc/fsl/fsl_ssi.c | 15 +++++++++++---- 1 file changed, 11 insertions(+), 4 deletions(-)
diff --git a/sound/soc/fsl/fsl_ssi.c b/sound/soc/fsl/fsl_ssi.c index 491b660..aa14a5d 100644 --- a/sound/soc/fsl/fsl_ssi.c +++ b/sound/soc/fsl/fsl_ssi.c @@ -201,6 +201,7 @@ struct fsl_ssi_soc_data {
- @cpu_dai_drv: CPU DAI driver for this device
- @dai_fmt: DAI configuration this device is currently used with
- @streams: Mask of current active streams: BIT(TX) and BIT(RX)
- @i2s_net: I2S and Network mode configurations of SCR register
- @use_dma: DMA is used or FIQ with stream filter
- @use_dual_fifo: DMA with support for dual FIFO mode
@@ -245,6 +246,7 @@ struct fsl_ssi { struct snd_soc_dai_driver cpu_dai_drv;
unsigned int dai_fmt;
- u8 streams; u8 i2s_net; bool use_dma; bool use_dual_fifo;
@@ -440,15 +442,14 @@ static void fsl_ssi_fifo_clear(struct fsl_ssi *ssi, bool is_rx) static void fsl_ssi_config(struct fsl_ssi *ssi, bool enable, struct fsl_ssi_regvals *vals) {
- bool dir = (&ssi->regvals[TX] == vals) ? TX : RX;
Using a bool variable for a bit index (and array index in other parts of code) looks just wrong.
Even a simple int would look better IMHO here (and in patch 5 that rewrites this line a bit).
Maciej