On Wednesday 13 May 2009 02:28:58 ext Ernesto Torres wrote:
Hi,
I would like to know the actual configuration for the output of the Beagle Board I2S, from the OMAP35x Reference Manual, on page 2887:
Is you external codec supports master mode (provides the needed clocks on the I2S bus)? I would suggest to use it in that way, since configuring OMAP to provide close enough frequency can be tricky. I have did this for experimenting on our custom board, just to see how it works. This is the code is taken from the soc board file's hw_params function:
div = clk_id = freq = 0; switch (params_rate(params)) { case 44100: /* 44.117 */ div = 68; clk_id = OMAP_MCBSP_SYSCLK_CLKS_FCLK; freq = 96000000; break; case 48000: /* 48.032 */ div = 54; clk_id = OMAP_MCBSP_SYSCLK_CLK; freq = 83000000; break; default: printk(KERN_ERR "hw params: unknown rate %d\n", params_rate(params)); return -EINVAL; }
ret = snd_soc_dai_set_sysclk(cpu_dai, clk_id, freq, SND_SOC_CLOCK_IN); if (ret < 0) { printk(KERN_ERR "can't set cpu system clock\n"); return ret; }
ret = cpu_dai->dai_ops.set_clkdiv(cpu_dai, OMAP_MCBSP_CLKGDV, div); if (ret < 0) { printk(KERN_ERR "can't set cpu clock divider\n"); }
As you can see I needed to select different clock source for 44.1 and 48 KHz sample rate for OMAP to use as a base for the dividing...
So: try to use the OMAP as slave, if it is possible.