On 1/1/2017 2:57 AM, Mark Brown wrote:
On Tue, Dec 20, 2016 at 04:47:07PM +0800, John Hsu wrote:
Provide the LRC and BCLK divide. The clock divide needs configuration properly when codec in master mode.
Why is the driver not able to configure these automatically, most devices manage to do that OK? Typically systems are fine with the obvious divisions down from the root clock, the driver should at least offer that as a default rather than requiring all machine drivers to duplicate the divisor selection code.
The system clock of codec is always 256FS. Therefore, the driver can make it automatically. If the codec is as master, the driver needs to divide the system clock to output the BCLK and FS. But there are too many combinations between BCLK and FS. The BCLK maybe is 32FS, 64FS, 128FS, etc. The driver needs machine information to do the division. Thus, I think the best way is to make decision by machine driver.
=========================================================================================== The privileged confidential information contained in this email is intended for use only by the addressees as indicated by the original sender of this email. If you are not the addressee indicated in this email or are not responsible for delivery of the email to such a person, please kindly reply to the sender indicating this fact and delete all copies of it from your computer and network server immediately. Your cooperation is highly appreciated. It is advised that any unauthorized use of confidential information of Nuvoton is strictly prohibited; and any information in this email irrelevant to the official business of Nuvoton shall be deemed as neither given nor endorsed by Nuvoton.