On 07/28/16 14:48, Peter Ujfalusi wrote:
diff --git a/Documentation/devicetree/bindings/sound/davinci-mcasp-audio.txt b/Documentation/devicetree/bindings/sound/davinci-mcasp-audio.txt index 46bc982..96d6244 100644 --- a/Documentation/devicetree/bindings/sound/davinci-mcasp-audio.txt +++ b/Documentation/devicetree/bindings/sound/davinci-mcasp-audio.txt @@ -39,6 +39,10 @@ Optional properties: please refer to pinctrl-bindings.txt
- fck_parent : Should contain a valid clock name which will be used as parent for the McASP fck
+- ahclkx-en: In case the MCASP runs in slave mode, e.g. i2s SCK and WS slave,
we can still provide the MCLK to a codec PLL using the AHCLKX
transmit clock output. This setup can be activated by using this
property. Clock master mode remains unaffected.
_if_ we hack this around in the driver I would rather have something like: hclk-source: Source of HCLK internal clock when McASP is clock master. With a new DT binding header file with defines:
/* Source of High-frequency transmit/receive clock */ #define MCASP_CLK_HCLK_AHCLK 0 /* AHCLKX/R */ #define MCASP_CLK_HCLK_AUXCLK 1 /* Internal functional clock */
Basically my old patches for McASP clock selection but w/o the improving the simple card. The only change would be that we ignore the set_sysclk's clk_id parameter and use the private clk_id we got via DT when the dir is SND_SOC_CLOCK_IN. Oh, and set the PDIR also when AUXCLK is selected for HCLK. In the DT you would have for your setup:
hclk-source = MCASP_CLK_HCLK_AUXCLK;
Or something like that.
But I think in this way we can work around the simple-card posed limitation a bit better, but it is still a questionable workaround.
the other issue is that if we add the DT property, we need to support that in the future, even if we have moved to CCF for clock selection...
I have attached my local patches for reference.
Example:
diff --git a/include/linux/platform_data/davinci_asp.h b/include/linux/platform_data/davinci_asp.h index 85ad68f..c878836 100644 --- a/include/linux/platform_data/davinci_asp.h +++ b/include/linux/platform_data/davinci_asp.h @@ -44,6 +44,11 @@ struct davinci_mcasp_pdata { int clk_input_pin;
/*
* Activate AHCLKX clock output in slave mode.
*/
- bool ahclkx_en;
- /*
- This flag works when both clock and FS are outputs for the cpu
- and makes clock more accurate (FS is not symmetrical and the
- clock is very fast.
diff --git a/sound/soc/davinci/davinci-mcasp.c b/sound/soc/davinci/davinci-mcasp.c index 237dc67..aba888e 100644 --- a/sound/soc/davinci/davinci-mcasp.c +++ b/sound/soc/davinci/davinci-mcasp.c @@ -94,6 +94,7 @@ struct davinci_mcasp {
int sysclk_freq; bool bclk_master;
bool ahclkx_en;
/* McASP FIFO related */ u8 txnumevt;
@@ -605,6 +606,10 @@ static int davinci_mcasp_set_sysclk(struct snd_soc_dai *dai, int clk_id, mcasp_set_bits(mcasp, DAVINCI_MCASP_AHCLKXCTL_REG, AHCLKXE); mcasp_set_bits(mcasp, DAVINCI_MCASP_AHCLKRCTL_REG, AHCLKRE); mcasp_set_bits(mcasp, DAVINCI_MCASP_PDIR_REG, AHCLKX);
- } else if (mcasp->ahclkx_en) {
mcasp_clr_bits(mcasp, DAVINCI_MCASP_AHCLKRCTL_REG, AHCLKRE);
It is safe to set this bit as well.
mcasp_set_bits(mcasp, DAVINCI_MCASP_AHCLKXCTL_REG, AHCLKXE);
} else { mcasp_clr_bits(mcasp, DAVINCI_MCASP_AHCLKXCTL_REG, AHCLKXE); mcasp_clr_bits(mcasp, DAVINCI_MCASP_AHCLKRCTL_REG, AHCLKRE);mcasp_set_bits(mcasp, DAVINCI_MCASP_PDIR_REG, AHCLKX);
@@ -1610,6 +1615,8 @@ static struct davinci_mcasp_pdata *davinci_mcasp_set_pdata_from_of( if (ret >= 0) pdata->op_mode = val;
- pdata->ahclkx_en = of_property_read_bool(np, "ahclkx-en");
- ret = of_property_read_u32(np, "tdm-slots", &val); if (ret >= 0) { if (val < 2 || val > 32) {
@@ -1851,6 +1858,7 @@ static int davinci_mcasp_probe(struct platform_device *pdev) mcasp->version = pdata->version; mcasp->txnumevt = pdata->txnumevt; mcasp->rxnumevt = pdata->rxnumevt;
mcasp->ahclkx_en = pdata->ahclkx_en;
mcasp->dev = &pdev->dev;
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