In dmaengine_pcm_set_runtime_hwparams() period_bytes_min is hardcoded to 256. For some applications that may be too big. This patch changes that to calculate the value based on dma_data->maxburst. The correct value would be maxburst multiplied by the address width of the hardware FIFO. Unfortunately the address width is dynamically calculated based on the stream parameters and is not known at open time, so the worst case is chosen here which is 8 bytes, the maximum that is supported by dmaengine drivers. Not all drivers may set a maxburst value, so we fall back to the previously used hardcoded value of 256 bytes.
Signed-off-by: Sascha Hauer s.hauer@pengutronix.de --- sound/soc/soc-generic-dmaengine-pcm.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/sound/soc/soc-generic-dmaengine-pcm.c b/sound/soc/soc-generic-dmaengine-pcm.c index 99253de29a74e..734d46b9783f7 100644 --- a/sound/soc/soc-generic-dmaengine-pcm.c +++ b/sound/soc/soc-generic-dmaengine-pcm.c @@ -122,7 +122,9 @@ dmaengine_pcm_set_runtime_hwparams(struct snd_soc_component *component, SNDRV_PCM_INFO_INTERLEAVED; hw.periods_min = 2; hw.periods_max = UINT_MAX; - hw.period_bytes_min = 256; + hw.period_bytes_min = dma_data->maxburst * DMA_SLAVE_BUSWIDTH_8_BYTES; + if (!hw.period_bytes_min) + hw.period_bytes_min = 256; hw.period_bytes_max = dma_get_max_seg_size(dma_dev); hw.buffer_bytes_max = SIZE_MAX; hw.fifo_size = dma_data->fifo_size;