Add pm ops support for SoundWire dma driver for ACP7.0 and ACP7.1 platforms.
Signed-off-by: Vijendar Mukunda Vijendar.Mukunda@amd.com --- sound/soc/amd/acp70/acp70-sdw-dma.c | 92 +++++++++++++++++++++++++++++ 1 file changed, 92 insertions(+)
diff --git a/sound/soc/amd/acp70/acp70-sdw-dma.c b/sound/soc/amd/acp70/acp70-sdw-dma.c index 2c01f60cf3b9..183db176725f 100644 --- a/sound/soc/amd/acp70/acp70-sdw-dma.c +++ b/sound/soc/amd/acp70/acp70-sdw-dma.c @@ -13,6 +13,7 @@ #include <sound/pcm_params.h> #include <sound/soc.h> #include <sound/soc-dai.h> +#include <linux/pm_runtime.h> #include <linux/soundwire/sdw_amd.h> #include "acp70.h"
@@ -128,6 +129,29 @@ static const struct snd_pcm_hardware acp70_sdw_hardware_capture = { .periods_max = SDW_CAPTURE_MAX_NUM_PERIODS, };
+static void acp70_enable_disable_sdw_dma_interrupts(void __iomem *acp_base, bool enable) +{ + u32 ext_intr_cntl, ext_intr_cntl1; + u32 irq_mask = ACP_SDW_DMA_IRQ_MASK; + u32 irq_mask1 = ACP_P1_SDW_DMA_IRQ_MASK; + + if (enable) { + ext_intr_cntl = readl(acp_base + ACP_EXTERNAL_INTR_CNTL); + ext_intr_cntl |= irq_mask; + writel(ext_intr_cntl, acp_base + ACP_EXTERNAL_INTR_CNTL); + ext_intr_cntl1 = readl(acp_base + ACP_EXTERNAL_INTR_CNTL1); + ext_intr_cntl1 |= irq_mask1; + writel(ext_intr_cntl1, acp_base + ACP_EXTERNAL_INTR_CNTL1); + } else { + ext_intr_cntl = readl(acp_base + ACP_EXTERNAL_INTR_CNTL); + ext_intr_cntl &= ~irq_mask; + writel(ext_intr_cntl, acp_base + ACP_EXTERNAL_INTR_CNTL); + ext_intr_cntl1 = readl(acp_base + ACP_EXTERNAL_INTR_CNTL1); + ext_intr_cntl1 &= ~irq_mask1; + writel(ext_intr_cntl1, acp_base + ACP_EXTERNAL_INTR_CNTL1); + } +} + static void acp70_config_dma(struct acp_sdw_dma_stream *stream, void __iomem *acp_base, u32 stream_id) { @@ -476,13 +500,81 @@ static int acp70_sdw_platform_probe(struct platform_device *pdev) dev_err(&pdev->dev, "Fail to register sdw dma component\n"); return status; } + pm_runtime_set_autosuspend_delay(&pdev->dev, ACP_SUSPEND_DELAY_MS); + pm_runtime_use_autosuspend(&pdev->dev); + pm_runtime_mark_last_busy(&pdev->dev); + pm_runtime_set_active(&pdev->dev); + pm_runtime_enable(&pdev->dev); return 0; }
+static void acp70_sdw_platform_remove(struct platform_device *pdev) +{ + pm_runtime_disable(&pdev->dev); +} + +static int acp_restore_sdw_dma_config(struct sdw_dma_dev_data *sdw_data) +{ + struct acp_sdw_dma_stream *stream; + struct snd_pcm_substream *substream; + struct snd_pcm_runtime *runtime; + u32 period_bytes, buf_size, water_mark_size_reg; + u32 stream_count; + int index, instance, ret; + + for (instance = 0; instance < AMD_SDW_MAX_MANAGERS; instance++) { + if (instance == ACP_SDW0) + stream_count = ACP70_SDW0_DMA_MAX_STREAMS; + else + stream_count = ACP70_SDW1_DMA_MAX_STREAMS; + + for (index = 0; index < stream_count; index++) { + if (instance == ACP_SDW0) { + substream = sdw_data->sdw0_dma_stream[index]; + water_mark_size_reg = + sdw0_dma_ring_buf_reg[index].water_mark_size_reg; + } else { + substream = sdw_data->sdw1_dma_stream[index]; + water_mark_size_reg = + sdw1_dma_ring_buf_reg[index].water_mark_size_reg; + } + + if (substream && substream->runtime) { + runtime = substream->runtime; + stream = runtime->private_data; + period_bytes = frames_to_bytes(runtime, runtime->period_size); + buf_size = frames_to_bytes(runtime, runtime->buffer_size); + acp70_config_dma(stream, sdw_data->acp_base, index); + ret = acp70_configure_sdw_ringbuffer(sdw_data->acp_base, index, + buf_size, instance); + if (ret) + return ret; + writel(period_bytes, sdw_data->acp_base + water_mark_size_reg); + } + } + } + acp70_enable_disable_sdw_dma_interrupts(sdw_data->acp_base, true); + return 0; +} + +static int __maybe_unused acp70_sdw_pcm_resume(struct device *dev) +{ + struct sdw_dma_dev_data *sdw_data; + + sdw_data = dev_get_drvdata(dev); + return acp_restore_sdw_dma_config(sdw_data); +} + +static const struct dev_pm_ops acp70_pm_ops = { + SET_SYSTEM_SLEEP_PM_OPS(NULL, acp70_sdw_pcm_resume) +}; + static struct platform_driver acp70_sdw_dma_driver = { .probe = acp70_sdw_platform_probe, + .remove = acp70_sdw_platform_remove, .driver = { .name = "amd_acp70_sdw_dma", + .pm = &acp70_pm_ops, }, };