Don't drop CCs from replies.
Sorry.
Vinod is trying to explain is that due to the bursty nature of data transfers inside the soc, we need to modify how the accounting is done.
Right, but this depends on the ability of the device to pause reading data when it reads up to the point where the application has written. This is a separate capability to any latency that's been added by the buffering, and most of the systems that have the buffering don't have this capability but instead either don't report the buffer or rely on the application being a full buffer ahead of the hardware.
We don't have such fancy hardware (and I don't think anyone has). This can happen even with simple IP that has an embedded SRAM and bursty DMA, if the IP buffer amounts to the period size to avoid partial wakes or transfers, and the application cannot provide more than one period initially you get an underflow that isn't a true one. -Pierre