August 2024 - Alsa-devel - mailman.alsa-project.org

[RESEND PATCH v2] drm/bridge: dw-hdmi-i2s: set insert_pcuv bit if hardware supports it
by Geraldo Nascimento 30 Dec '24

30 Dec '24

Hi Mark, resending this as it failed to apply in my last submission. Added Neil Armstrong to Cc: as hopefully he will be able to better review this. Thanks, Geraldo Nascimento --- Starting with version 2.10a of Synopsys DesignWare HDMI controller the insert_pcuv bit was introduced. On RK3399pro SoM (Radxa Rock Pi N10), for example, if we neglect to set this bit and proceed to enable hdmi_sound and i2s2 on the device tree there will be extreme clipping of sound output, to the point that music sounds like white noise. Problem could also manifest as just mild cracking depending of HDMI audio implementation of sink. Setting insert_pcuv bit (bit 2 of aud_conf2 Audio Sample register) fixes this. Signed-off-by: Geraldo Nascimento <geraldogabriel(a)gmail.com> --- v1->v2: SoC->SoM on description, better commenting, minor style changes, conditional application of fix for L-PCM only --- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi-i2s-audio-20221017.c +++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi-i2s-audio-20221017.c @@ -42,6 +42,7 @@ static int dw_hdmi_i2s_hw_params(struct device *dev, void *data, struct dw_hdmi *hdmi = audio->hdmi; u8 conf0 = 0; u8 conf1 = 0; + u8 conf2 = 0; u8 inputclkfs = 0; /* it cares I2S only */ @@ -101,6 +102,28 @@ static int dw_hdmi_i2s_hw_params(struct device *dev, void *data, return -EINVAL; } + /* + * dw-hdmi introduced insert_pcuv bit in + * version 2.10a. + * + * This single bit (bit 2 of HDMI_AUD_CONF2) + * when set to 1 will enable the insertion of the PCUV + * (Parity, Channel Status, User bit and Validity) + * bits on the incoming audio stream. + * + * Support is limited to Linear PCM audio. If + * neglected, the lack of valid PCUV bits + * on L-PCM streams will cause anything from + * mild cracking to full blown extreme + * clipping depending on the HDMI audio + * implementation of the sink. + * + */ + + if (hdmi_read(audio, HDMI_DESIGN_ID) >= 0x21 && + !(hparms->iec.status[0] & IEC958_AES0_NONAUDIO)) + conf2 = HDMI_AUD_CONF2_INSERT_PCUV; + dw_hdmi_set_sample_rate(hdmi, hparms->sample_rate); dw_hdmi_set_channel_status(hdmi, hparms->iec.status); dw_hdmi_set_channel_count(hdmi, hparms->channels); @@ -109,6 +120,7 @@ static int dw_hdmi_i2s_hw_params(struct device *dev, void *data, hdmi_write(audio, inputclkfs, HDMI_AUD_INPUTCLKFS); hdmi_write(audio, conf0, HDMI_AUD_CONF0); hdmi_write(audio, conf1, HDMI_AUD_CONF1); + hdmi_write(audio, conf2, HDMI_AUD_CONF2); return 0; } --- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi-20221017.h +++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi-20221017.h @@ -931,6 +931,11 @@ enum { HDMI_AUD_CONF1_WIDTH_16 = 0x10, HDMI_AUD_CONF1_WIDTH_24 = 0x18, +/* AUD_CONF2 field values */ + HDMI_AUD_CONF2_HBR = 0x01, + HDMI_AUD_CONF2_NLPCM = 0x02, + HDMI_AUD_CONF2_INSERT_PCUV = 0x04, + /* AUD_CTS3 field values */ HDMI_AUD_CTS3_N_SHIFT_OFFSET = 5, HDMI_AUD_CTS3_N_SHIFT_MASK = 0xe0,

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[PATCH v4 0/9] ASoC: samsung: midas-audio: Add GPIO-based headset jack detection
by Artur Weber 29 Dec '24

29 Dec '24

Many of Samsung's Exynos 4 devices share the same midas-audio driver to handle the codec setup. While most of these devices, including the Midas itself, use the jack detection provided by the WM8994 driver, other devices such as the Samsung Galaxy Tab 3 8.0 (lt01) use two GPIOs and an ADC channel to determine jack insertion, the jack's type, and button presses (for headsets with volume up/down/play buttons). In the downstream kernel, this behavior is implemented in the sec-jack driver[1], and the per-device settings are configured in *-jack.c files in the mach folder (see e.g. the Tab 3's implementation[2]). This patchset implements this mechanism in the midas_wm1811.c driver, and adds new DTS options to allow for its configuration. It also enables jack detection for the Samsung Galaxy Tab 3 8.0. A very similar mechanism was already present in the aries_wm8994.c driver[3]; this implementation heavily borrows from it, though there are a few extra cleanups as well. Signed-off-by: Artur Weber <aweber.kernel(a)gmail.com> [1] https://github.com/gr8nole/android_kernel_samsung_smdk4x12/blob/lineage-14.… [2] https://github.com/gr8nole/android_kernel_samsung_smdk4x12/blob/lineage-14.… [3] https://github.com/torvalds/linux/blob/master/sound/soc/samsung/aries_wm899… --- Changes in v4: - Replaced manual regulator toggles with SND_SOC_DAPM_REGULATOR_SUPPLY, both for existing mic bias regulators and for the new headset mic bias regulator - Link to v3: https://lore.kernel.org/r/20240519-midas-wm1811-gpio-jack-v3-0-0c1736144c0e… Changes in v3: - Re-added pipe (|) character to samsung,headset-button-threshold-microvolt description to prevent it from being parsed as a mapping (fixes syntax error) - Split out "ASoC: dt-bindings: samsung,midas-audio: Add GPIO-based headset jack detection" into two patches - Link to v2: https://lore.kernel.org/r/20240508-midas-wm1811-gpio-jack-v2-0-b4d36cd02c6e… Changes in v2: - Added vendor prefix to threshold properties - Added separate headset mic bias regulator - Changed some cases of dev_err + return with return dev_err_probe - Added an extra patch to replace some previous dev_err + return cases with dev_err_probe - Moved tab3 DTS wm1811 codec config changes to separate commit --- Artur Weber (9): ASoC: dt-bindings: samsung,midas-audio: Add headset mic bias supply ASoC: dt-bindings: samsung,midas-audio: Add GPIO-based headset jack detection ASoC: samsung: midas_wm1811: Use SND_SOC_DAPM_REGULATOR_SUPPLY for bias regulators ASoC: samsung: midas_wm1811: Add headset mic bias supply support ASoC: samsung: midas_wm1811: Add GPIO-based headset jack detection ASoC: samsung: midas_wm1811: Use dev_err_probe where appropriate ARM: dts: samsung: exynos4212-tab3: Fix headset mic, add jack detection ARM: dts: samsung: exynos4212-tab3: Add MCLK2 clock to WM1811 codec config ARM: dts: samsung: exynos4212-tab3: Drop interrupt from WM1811 codec .../bindings/sound/samsung,midas-audio.yaml | 33 ++ arch/arm/boot/dts/samsung/exynos4212-tab3.dtsi | 31 +- sound/soc/samsung/Kconfig | 2 +- sound/soc/samsung/midas_wm1811.c | 348 +++++++++++++++++---- 4 files changed, 343 insertions(+), 71 deletions(-) --- base-commit: a38297e3fb012ddfa7ce0321a7e5a8daeb1872b6 change-id: 20240502-midas-wm1811-gpio-jack-b10226b17ecc Best regards, -- Artur Weber <aweber.kernel(a)gmail.com>

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hda: how to implement component master_unbind?
by Kai Vehmanen 20 Dec '24

20 Dec '24

Hi Takashi et al, I've been having multiple discussions with our i915 team w.r.t. audio driver behaviour when the aggregate component is unbound, triggered by i915 unbind. This came up again in the recent regression with devres allocations and I now dug into the topic again. In short, I'm puzzled how to really implement this. ALSA (or ASoC) don't really have support for individual components of a card disappearing in a hotplug fashion. At card level, we do have such support (USB, firewire and recent work for PCI hotplug). But not individual components of a card getting unplugged. In current code we have this: static void hdac_component_master_unbind(struct device *dev) { » struct drm_audio_component *acomp = hdac_get_acomp(dev); » if (acomp->audio_ops && acomp->audio_ops->master_unbind) » » acomp->audio_ops->master_unbind(dev, acomp); » module_put(acomp->ops->owner); » component_unbind_all(dev, acomp); » WARN_ON(acomp->ops || acomp->dev); } ... when e.g. i915 driver is unbound (but could be any driver using the component framework, not jus Intel hw), i915 calls component_del() and HDA gets call to the above. After this, acomp ops are null are audio no longer has ability to talk to i915 driver (which makes sense given it's unbound). If audio was runtime suspended, this kind of works (but relies on some good luck). Upon HDA controller resume, we note acomp ops are NULL and HDMI/DP operations (like snd_hdac_display_power()) silently become no-ops. PCM streaming will go to /dev/null, but this is ok'ish since no monitor can be connected anyways. If audio was active, we start to get warnings or worse. Audio expects hw display codec to be powered and programmed, but suddenly it mey lose state. If the audio controller is actually part of the display hardware (e.g. discrete GPUs), then controller registers can stop functioning (they should be still available, but given the main diplay driver is unbound, odds of suprising behaviour are high). So this is less than ideal. I've been looking at options: 1) prevent/block the unbind if audio device is busy The component framework does not allow individual components to return -EBUSY, so there's no way to let others know that unbind is not possible now. This would force anyone testing DRM driver unbind to first unbind the audio driver and stop any active audio use-cases if needed. 2) unbind the ALSA card I've experimented doing a device_unregister() from the above callback, but this has not really worked (onion peeling exercise of new probelms). The code is shared by multiple controllers, so getting a handle to an snd_card object is not straighforward (drvdata is differnet for SOF and snd-hda-intel for instance). But with some new work, maybe we could call snd_card_disconnect() to detach the card and inform user-space. 3) continue as-is and try to fix bugs If audio is active, maybe we could force a acomp->put_power() to ensure a clean unregister of the display part. But this leaves a big chunk of issues especially with HDA controllers that require the display to be powered on, to function. .. Any ideas, and/or has there been prior work? It seems Takashi it's been mostly you who has been active working on the acomp integration recently. I also included Chris, Daniel and Jani who've had patches to hdac_component.c. Br, Kai

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[PATCH] dt-bindings: sound:atmel-at91sam9g20ek: convert bindings to json-schema
by Balakrishnan Sambath 10 Dec '24

10 Dec '24

Convert atmel-at91sam9g20ek-wm8731-audio DT binding to yaml based json-schema.Change file name to match json-scheme naming. Signed-off-by: Balakrishnan Sambath <balakrishnan.s(a)microchip.com> --- .../bindings/sound/atmel,at91sam9g20ek-wm8731.yaml | 60 ++++++++++++++++++++++ .../sound/atmel-at91sam9g20ek-wm8731-audio.txt | 26 ---------- 2 files changed, 60 insertions(+), 26 deletions(-) diff --git a/Documentation/devicetree/bindings/sound/atmel,at91sam9g20ek-wm8731.yaml b/Documentation/devicetree/bindings/sound/atmel,at91sam9g20ek-wm8731.yaml new file mode 100644 index 000000000000..f6330707fe1b --- /dev/null +++ b/Documentation/devicetree/bindings/sound/atmel,at91sam9g20ek-wm8731.yaml @@ -0,0 +1,60 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/sound/atmel,at91sam9g20ek-wm8731.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Atmel at91sam9g20ek wm8731 audio complex + +maintainers: + - Balakrishnan Sambath <balakrishnan.s(a)microchip.com> + +properties: + compatible: + const: atmel,at91sam9g20ek-wm8731-audio + + atmel,model: + $ref: /schemas/types.yaml#/definitions/string + description: The user-visible name of this sound complex. + atmel,audio-routing: + $ref: /schemas/types.yaml#/definitions/non-unique-string-array + description: A list of the connections between audio components. + minItems: 2 + items: + enum: + # Board Connectors + - "Ext Spk" + - "Int MIC" + + # CODEC Pins + - LHPOUT + - MICIN + atmel,ssc-controller: + $ref: /schemas/types.yaml#/definitions/phandle + description: The phandle of the SSC controller + atmel,audio-codec: + $ref: /schemas/types.yaml#/definitions/phandle + description: The phandle of WM8731 audio codec + +required: + - compatible + - atmel,model + - atmel,audio-routing + - atmel,ssc-controller + - atmel,audio-codec + +additionalProperties: false + +examples: + - | + sound { + compatible = "atmel,at91sam9g20ek-wm8731-audio"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pck0_as_mck>; + atmel,model = "wm8731 @ AT91SAMG20EK"; + atmel,audio-routing = + "Ext Spk", "LHPOUT", + "Int MIC", "MICIN"; + atmel,ssc-controller = <&ssc0>; + atmel,audio-codec = <&wm8731>; + }; diff --git a/Documentation/devicetree/bindings/sound/atmel-at91sam9g20ek-wm8731-audio.txt b/Documentation/devicetree/bindings/sound/atmel-at91sam9g20ek-wm8731-audio.txt deleted file mode 100644 index 9c5a9947b64d..000000000000 --- a/Documentation/devicetree/bindings/sound/atmel-at91sam9g20ek-wm8731-audio.txt +++ /dev/null @@ -1,26 +0,0 @@ -* Atmel at91sam9g20ek wm8731 audio complex - -Required properties: - - compatible: "atmel,at91sam9g20ek-wm8731-audio" - - atmel,model: The user-visible name of this sound complex. - - atmel,audio-routing: A list of the connections between audio components. - - atmel,ssc-controller: The phandle of the SSC controller - - atmel,audio-codec: The phandle of the WM8731 audio codec -Optional properties: - - pinctrl-names, pinctrl-0: Please refer to pinctrl-bindings.txt - -Example: -sound { - compatible = "atmel,at91sam9g20ek-wm8731-audio"; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_pck0_as_mck>; - - atmel,model = "wm8731 @ AT91SAMG20EK"; - - atmel,audio-routing = - "Ext Spk", "LHPOUT", - "Int MIC", "MICIN"; - - atmel,ssc-controller = <&ssc0>; - atmel,audio-codec = <&wm8731>; -}; --- base-commit: 0dd3ee31125508cd67f7e7172247f05b7fd1753a change-id: 20240214-at91sam9g20ek-wm8731-yaml-404ddddbb91a Best regards, -- Balakrishnan Sambath <balakrishnan.s(a)microchip.com>

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[PATCH v2 0/3] ASoC: mediatek:mt8186: fix both the speaker and hdmi
by Jiaxin Yu 06 Dec '24

06 Dec '24

The speaker and hdmi of mt8186 platform are shared the same port of I2S, when connect the external display, use build-in speakers to play audio, they both playback at the same time. So we want to manage the playback device through DAPM events. Change since v1: Support audio function for it6505 bridge to hdmi-codec Jiaxin Yu (3): ASoC: hdmi-codec: Add event handler for hdmi TX ASoC: mediatek: mt8186: correct the HDMI widgets drm/bridge: it6505: Add audio support drivers/gpu/drm/bridge/ite-it6505.c | 81 +++++++++++++++++-- include/sound/hdmi-codec.h | 6 ++ sound/soc/codecs/hdmi-codec.c | 37 ++++++++- .../mt8186/mt8186-mt6366-da7219-max98357.c | 2 +- .../mt8186/mt8186-mt6366-rt1019-rt5682s.c | 2 +- 5 files changed, 116 insertions(+), 12 deletions(-) -- 2.18.0

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[alsa-devel] Error patching file pcm_native.c
by Delusion's Master 20 Nov '24

20 Nov '24

Hi, first of all I apologize in case you receive multiple copies of this message, but I forgot to specify a subject in the original mail. I have a problem compiling the latest alsa driver snapshots. Specifically, it's a problem when patching pcm_native.c: [..] copying file alsa-kernel/core/info.c patching file info.c copying file alsa-kernel/core/pcm.c patching file pcm.c Hunk #3 succeeded at 739 (offset 2 lines). Hunk #5 succeeded at 954 (offset 2 lines). Hunk #7 succeeded at 1045 (offset 2 lines). copying file alsa-kernel/core/pcm_native.c patching file pcm_native.c Hunk #4 succeeded at 1544 (offset -25 lines). Hunk #5 succeeded at 2827 (offset 12 lines). Hunk #6 succeeded at 2878 (offset 10 lines). Hunk #7 FAILED at 2906. Hunk #8 FAILED at 2922. Hunk #9 succeeded at 2915 (offset -23 lines). Hunk #10 succeeded at 3036 (offset 10 lines). Hunk #11 succeeded at 3027 (offset -23 lines). Hunk #12 succeeded at 3074 (offset 10 lines). Hunk #13 succeeded at 3098 (offset -23 lines). Hunk #14 succeeded at 3143 (offset 10 lines). Hunk #15 succeeded at 3124 (offset -23 lines). Hunk #16 succeeded at 3214 (offset 10 lines). Hunk #17 succeeded at 3208 (offset -23 lines). Hunk #18 succeeded at 3271 (offset 10 lines). Hunk #19 succeeded at 3304 (offset -23 lines). Hunk #20 succeeded at 3386 (offset 10 lines). Hunk #21 succeeded at 3411 (offset -23 lines). Hunk #22 succeeded at 3456 (offset 10 lines). Hunk #23 succeeded at 3450 (offset -23 lines). Hunk #24 succeeded at 3525 (offset 10 lines). Hunk #25 succeeded at 3644 (offset -23 lines). 2 out of 25 hunks FAILED -- saving rejects to file pcm_native.c.rej make[2]: *** [pcm_native.c] Error 1 It's some days I get this, but I waited to report this since I thought it could be a temporary problem. My OS is Fedora 11 x86_64. Previous snapshots didn't give me this problem, but I can't say which one broke the compilation, since I usually try updated snapshots only at kernel updates. I searched for this error and the only relevant report I could find is this one: http://mailman.alsa-project.org/pipermail/alsa-devel/2009-April/016420.html a report from last April. What could the problem be? Thanks _________________________________________________________________ Invite your mail contacts to join your friends list with Windows Live Spaces. It's easy! http://spaces.live.com/spacesapi.aspx?wx_action=create&wx_url=/friends.aspx…

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ALSA 1.2.8 release
by Jaroslav Kysela 12 Nov '24

12 Nov '24

Hello all, new ALSA userspace packages were released. You may download them from the ALSA website http://www.alsa-project.org or directly: HTTP: https://www.alsa-project.org/files/pub FTP: ftp://ftp.alsa-project.org/pub Released packages: alsa-lib alsa-utils alsa-ucm-conf tinycompress Full list of changes: https://www.alsa-project.org/wiki/Changes_v1.2.7.2_v1.2.8 The fingerprint of the public signing key is: F04D F507 37AC 1A88 4C4B 3D71 8380 596D A6E5 9C91 Have fun, Jaroslav -- Jaroslav Kysela <perex(a)perex.cz> Linux Sound Maintainer; ALSA Project; Red Hat, Inc.

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[alsa-devel] [RFC PATCH 00/10] Add support for DMA and audio codec of F1C100s
by Mesih Kilinc 23 Oct '24

23 Oct '24

This is RFC patchset for Allwinner suniv F1C100s to support DMA and audio codec. Allwinner F1C100s has a audio codec that has necessary digital and analog parts. It has r-l headphone output and microphone, line, r-l FM inputs. ADC can capture any inputs and also output channels via mux. Any input channels or DAC samples can feed output channels. Add support for this audio codec. F1C100s utilizes DMA channels to send and receive ADC-DAC samples. So DMA support needed. Patch 1~5 adds support for DMA. Suniv F1C100s has very similar DMA to sun4i. But there is some dissimilarities also. Suniv features a DMA reset bit in clock control unit. It has smaller number of DMA channels. Several registers has different addresses. It's max burst size is 4 instead of 8. Also DMA endpoint numbers are different. Patch 6 adds DMA max burst option to sun4i-codec. Patch 7~8 Add support for suniv F1C100s audio codec. Patch 9 adds audio codec to suniv-f1c100s.dtsi Patch 10 adds audio codec support to Lichee Pi Nano board. Thanks! Mesih Kilinc (10): dma-engine: sun4i: Add a quirk to support different chips dma-engine: sun4i: Add has_reset option to quirk dt-bindings: dmaengine: Add Allwinner suniv F1C100s DMA dma-engine: sun4i: Add support for Allwinner suniv F1C100s ARM: dts: suniv: f1c100s: Add support for DMA ASoC: sun4i-codec: Add DMA Max Burst field dt-bindigs: sound: Add Allwinner suniv F1C100s Audio Codec ASoC: sun4i-codec: Add support for Allwinner suniv F1C100s ARM: dts: suniv: f1c100s: Add support for Audio Codec ARM: dts: suniv: f1c100s: Activate Audio Codec for Lichee Pi Nano .../devicetree/bindings/dma/sun4i-dma.txt | 4 +- .../devicetree/bindings/sound/sun4i-codec.txt | 5 + arch/arm/boot/dts/suniv-f1c100s-licheepi-nano.dts | 8 + arch/arm/boot/dts/suniv-f1c100s.dtsi | 25 ++ drivers/dma/Kconfig | 4 +- drivers/dma/sun4i-dma.c | 221 ++++++++++-- sound/soc/sunxi/sun4i-codec.c | 371 ++++++++++++++++++++- 7 files changed, 601 insertions(+), 37 deletions(-) -- 2.7.4

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[PATCH] ALSA: hda/realtek: tas2781: Fix ROG ALLY X audio
by Jonathan LoBue 11 Oct '24

11 Oct '24

This patch enables the TI TAS2781 amplifier SoC for the ASUS ROG ALLY X. This is a design change from the original ASUS ROG ALLY, creating the need for this patch. All other Realtek Codec settings seem to be re-used from the original ROG ALLY design (on the ROG ALLY X). This patch maintains the previous settings for the Realtek codec portion, but enables the I2C binding for the TI TAS2781 amplifier (instead of the Cirrus CS35L41 amp used on the original ASUS ROG ALLY). One other requirement must be met for audio to work on the ASUS ROG ALLY X. A proper firmware file in the correct location with a proper symlink. We had reached out to TI engineers and confirmed that the firmware found in the Windows' driver package has a GPL license. Bazzite Github is hosting this firmware file for now until proper linux-firmware upstreaming can occur. https://github.com/ublue-os/bazzite This firmware file should be placed in /usr/lib/firmware/ti/tas2781/TAS2XXX1EB3.bin with a symlink to it from /usr/lib/firmware/TAS2XXX1EB3.bin Co-developed by: Kyle Gospodnetich <me(a)kylegospodneti.ch> Signed-off-by: Kyle Gospodnetich <me(a)kylegospodneti.ch> Co-developed by: Jan Drogehoff <sentrycraft123(a)gmail.com> Signed-off-by: Jan Drogehoff <sentrycraft123(a)gmail.com> Signed-off-by: Antheas Kapenekakis <lkml(a)antheas.dev> Tested-by: Richard Alvarez <alvarez.richard(a)gmail.com> Tested-by: Miles Montierth <cyber_dopamine(a)intheblackmedia.com> Signed-off-by: Jonathan LoBue <jlobue10(a)gmail.com> --- sound/pci/hda/patch_realtek.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/sound/pci/hda/patch_realtek.c b/sound/pci/hda/patch_realtek.c index 480e82df7a4c..9bc39c2ee6b9 100644 --- a/sound/pci/hda/patch_realtek.c +++ b/sound/pci/hda/patch_realtek.c @@ -7410,6 +7410,7 @@ enum { ALC285_FIXUP_THINKPAD_X1_GEN7, ALC285_FIXUP_THINKPAD_HEADSET_JACK, ALC294_FIXUP_ASUS_ALLY, + ALC294_FIXUP_ASUS_ALLY_X, ALC294_FIXUP_ASUS_ALLY_PINS, ALC294_FIXUP_ASUS_ALLY_VERBS, ALC294_FIXUP_ASUS_ALLY_SPEAKER, @@ -8877,6 +8878,12 @@ static const struct hda_fixup alc269_fixups[] = { .chained = true, .chain_id = ALC294_FIXUP_ASUS_ALLY_PINS }, + [ALC294_FIXUP_ASUS_ALLY_X] = { + .type = HDA_FIXUP_FUNC, + .v.func = tas2781_fixup_i2c, + .chained = true, + .chain_id = ALC294_FIXUP_ASUS_ALLY_PINS + }, [ALC294_FIXUP_ASUS_ALLY_PINS] = { .type = HDA_FIXUP_PINS, .v.pins = (const struct hda_pintbl[]) { @@ -10313,6 +10320,7 @@ static const struct snd_pci_quirk alc269_fixup_tbl[] = { SND_PCI_QUIRK(0x1043, 0x1740, "ASUS UX430UA", ALC295_FIXUP_ASUS_DACS), SND_PCI_QUIRK(0x1043, 0x17d1, "ASUS UX431FL", ALC294_FIXUP_ASUS_DUAL_SPK), SND_PCI_QUIRK(0x1043, 0x17f3, "ROG Ally NR2301L/X", ALC294_FIXUP_ASUS_ALLY), + SND_PCI_QUIRK(0x1043, 0x1eb3, "ROG Ally X RC72LA", ALC294_FIXUP_ASUS_ALLY_X), SND_PCI_QUIRK(0x1043, 0x1863, "ASUS UX6404VI/VV", ALC245_FIXUP_CS35L41_SPI_2), SND_PCI_QUIRK(0x1043, 0x1881, "ASUS Zephyrus S/M", ALC294_FIXUP_ASUS_GX502_PINS), SND_PCI_QUIRK(0x1043, 0x18b1, "Asus MJ401TA", ALC256_FIXUP_ASUS_HEADSET_MIC), -- 2.46.0

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Add stacked and parallel memories support in spi-nor
by Mahapatra, Amit Kumar 10 Oct '24

10 Oct '24

Hello Everyone, As https://lore.kernel.org/all/20231125092137.2948-8-amit.kumar-mahapatra@amd.… thread discussing the addition of stacked and parallel mode support in SPI-NOR has become too long and difficult to follow. Therefore, I'm starting a new email thread to focus on the DT binding changes and the overall implementation architecture for adding stacked and parallel (multi-CS) support in the Kernel. Please share your input on this approach. Background: The AMD QSPI controller supports two advanced connection modes(Stacked and Dual Parallel) which allow the controller to treat two different flashes as one storage. Stacked: Flashes share the same SPI bus, but different CS line, controller driver asserts the CS of the flash to which it needs to communicate. Stacked mode is a software abstraction rather than a controller feature or capability. At any given time, the controller communicates with one of the two connected flash devices, as determined by the requested address and data length. If an operation starts on one flash and ends on the other, the core needs to split it into two separate operations and adjust the data length accordingly. Dual Parallel: Both the flashes have their separate SPI bus, CS of both the flashes will be asserted/de-asserted at the same time. In this mode data will be split across both the flashes by enabling the STRIPE setting in the controller. Parallel mode is a controller feature where if the STRIPE bit is set then the controller internally handles the data split during data write to the flashes and while reading data from the flash the controller internally merges data from both the flashes before writing to the controller FIFO. If STRIPE is not enabled, then same data will be sent to both the devices. In parallel mode both the flashes should be identical. For more information on the modes please feel free to go through the controller flash interface below https://docs.amd.com/r/en-US/am011-versal-acap-trm/QSPI-Flash-Device-Interf… Mirochip QSPI controller also supports "Dual Parallel 8-bit IO mode", but they call it "Twin Quad Mode". https://ww1.microchip.com/downloads/aemDocuments/documents/MPU32/ProductDoc… Initially in [1] [2] [3] Miquel had tried to extend MTD-CONCAT driver to support Stacked mode, but the bindings were not accepted. [1] https://lore.kernel.org/all/20191113171505.26128-4-miquel.raynal@bootlin.co… [2] https://lore.kernel.org/all/20191127105522.31445-5-miquel.raynal@bootlin.co… [3]https://lore.kernel.org/all/20211112152411.818321-1-miquel.raynal@bootlin… So, the MTD-CONCAT approach was dropped and the DT bindings that got accepted [4] [5] [6] describe the two flash devices as being one. [4] https://github.com/torvalds/linux/commit/f89504300e94524d5d5846ff8b728592ac… [5] https://github.com/torvalds/linux/commit/eba5368503b4291db7819512600fa014ea… [6] https://github.com/torvalds/linux/commit/e2edd1b64f1c79e8abda365149ed62a2a9… SPI core changes to support the above bindings were added through the following commit: https://github.com/torvalds/linux/commit/4d8ff6b0991d5e86b17b235fc46ec62e91… While adding the support in SPI-NOR we received some inputs/suggestions from Tudor, based on that I am planning to add a new layer between the SPI-NOR and MTD layers to support stacked and parallel configurations. This new layer will be part of the spi-nor and located in mtd/spi-nor/. This layer would perform the following tasks: - During probing, store information from all the connected flashes, whether in stacked or parallel mode, and present it as a single device to the MTD layer. - Register callbacks and manage MTD device registration within the new layer instead of in spi-nor/core.c - There will very minimal change in spinor/core.c as the stacked & parallel handling will be managed by the new layer on top of SPI-NOR. - In stacked mode, the new layer will select the appropriate spi-nor flash based on the address provided by the MTD layer during flash operations. - Manage flash crossover operations in stacked mode. - Handle odd byte count requests from the MTD layer during flash operations in parallel mode. For implementing this the current DT binding[1] [2] [3] need to be updated as follows. stacked-memories DT changes: - Flash size information can be retrieved directly from the flash, so it has been removed from the DT binding. - Each stacked flash will have its own flash node. This approach allows flashes of different makes and sizes to be stacked together, as each flash will be probed individually. - Each of the flash node will have its own "reg" property that will contain its physical CS. - The stacked-memories DT bindings will contain the phandles of the flash nodes connected in stacked mode. - The first flash node will contain the mtd partition that would have the cross over memory staring at a memory location in the first flash and ending at some memory location of the 2nd flash - The new layer will update the mtd->size and other mtd_info parameters after both the flashes are probed and will call mtd_device_register with the combined information. spi@0 { flash@0 { compatible = "jedec,spi-nor" reg = <0x00>; stacked-memories = <&flash@0 &flash@1>; spi-max-frequency = <50000000>; ... partition@0 { label = "qspi-0"; reg = <0x0 0xf00000>; }; } flash@1 { compatible = "jedec,spi-nor" reg = <0x01>; spi-max-frequency = <50000000>; ... partition@0 { label = "qspi-1"; reg = <0x0 0x800000>; }; } } parallel-memories DT changes: - Flash size information can be retrieved directly from the flash, so it has been removed from the DT binding. - Each flash connected in parallel mode should be identical and will have one flash node for both the flash devices. - The "reg" prop will contain the physical CS number for both the connected flashes. - The new layer will double the mtd-> size and register it with the mtd layer. spi@0 { flash@0 { compatible = "jedec,spi-nor" reg = <0x00 0x01>; parallel-memories; spi-max-frequency = <50000000>; ... partition@0 { label = "qspi-0"; reg = <0x0 0xf00000>; } }; } Regards, Amit

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