August 2023 - Alsa-devel - mailman.alsa-project.org

[alsa-devel] echo-cancellation plugin advice?
by Max Klein 27 Oct '23

27 Oct '23

> Well, asym wouldn't be the answer. Basically you'll need to open two > slave PCMs in one plugin. So, it's no simple filter-type plugin. > It's doable, but not easy as it sounds, I guess. Takashi, can you please further explain why asym is not the solution and what you see as a problem? I am also trying to figure out if it would be possible to create such a plugin for ALSA? I am still searching for some good starting points on how to write an ALSA plugin... Jean-Marc Valin (http://lists.linuxaudio.org/pipermail/linux-audio-dev/2005-June/012454.html) already released his work as part of speex but as far I know there is no plugin that has been made out of it? Thanks for any hint! -- NEU: FreePhone 3-fach-Flat mit kostenlosem Smartphone! Jetzt informieren: http://mobile.1und1.de/?ac=OM.PW.PW003K20328T7073a

3 2

[PATCH 0/3] ARM: omap4: embt2ws: Add audio support
by Andreas Kemnade 25 Oct '23

25 Oct '23

Add audio support for Epson Moverio BT-200. In the vendor kernel, the MCBSP side is used as master, so do it here also that way. Andreas Kemnade (3): ASoC: ti: omap-mcbsp: Ignore errors for getting fck_src ASoC: tlv320aic3x: use BCLK instead of MCLK if not in master mode ARM: dts: omap4: embt2ws: Add audio support arch/arm/boot/dts/omap4-epson-embt2ws.dts | 21 +++++++++++++++++++++ sound/soc/codecs/tlv320aic3x.c | 4 ++++ sound/soc/ti/omap-mcbsp.c | 4 ++-- 3 files changed, 27 insertions(+), 2 deletions(-) -- 2.39.2

4 28

[PATCH v4 00/11] Introduce STM32 Firewall framework
by Gatien Chevallier 29 Sep '23

29 Sep '23

Introduce STM32 Firewall framework for STM32MP1x and STM32MP2x platforms. STM32MP1x(ETZPC) and STM32MP2x(RIFSC) Firewall controllers register to the framework to offer firewall services such as access granting. This series of patches is a new approach on the previous STM32 system bus, history is available here: https://lore.kernel.org/lkml/20230127164040.1047583/ The need for such framework arises from the fact that there are now multiple hardware firewalls implemented across multiple products. Drivers are shared between different products, using the same code. When it comes to firewalls, the purpose mostly stays the same: Protect hardware resources. But the implementation differs, and there are multiple types of firewalls: peripheral, memory, ... Some hardware firewall controllers such as the RIFSC implemented on STM32MP2x platforms may require to take ownership of a resource before being able to use it, hence the requirement for firewall services to take/release the ownership of such resources. On the other hand, hardware firewall configurations are becoming more and more complex. These mecanisms prevent platform crashes or other firewall-related incoveniences by denying access to some resources. The stm32 firewall framework offers an API that is defined in firewall controllers drivers to best fit the specificity of each firewall. For every peripherals protected by either the ETZPC or the RIFSC, the firewall framework checks the firewall controlelr registers to see if the peripheral's access is granted to the Linux kernel. If not, the peripheral is configured as secure, the node is marked populated, so that the driver is not probed for that device. The firewall framework relies on the feature-domain-controller device tree bindings: https://lore.kernel.org/lkml/0c0a82bb-18ae-d057-562b. It is used by peripherals to reference a domain controller, in this case a firewall feature domain. The bus uses the ID referenced by the feature-domains property to know where to look in the firewall to get the security configuration for the peripheral. This allows a device tree description rather than a hardcoded peripheral table in the bus driver. The STM32 ETZPC device is responsible for filtering accesses based on security level, or co-processor isolation for any resource connected to it. The RIFSC is responsible for filtering accesses based on Compartment ID / security level / privilege level for any resource connected to it. STM32MP13/15/25 SoC device tree files are updated in this series to implement this mecanism. Changes in V4: - Fix typo in commit message and YAML check errors in "dt-bindings: Document common device controller bindings" Note: This patch should be ignored as stated in the cover letter. I've done this to avoid errors on this series of patch - Correct code syntax/style issues reported by Simon Horman - Added Jonathan's tag for IIO on the treewide patch Changes in V3: Change incorrect ordering for bindings commits leading to an error while running "make DT_CHECKER_FLAGS=-m dt_binding_check" Changes in V2: generic: - Add fw_devlink dependency for "feature-domains" property. bindings: - Corrected YAMLS errors highlighted by Rob's robot - Firewall controllers YAMLs no longer define the maxItems for the "feature-domains" property - Renamed st,stm32-rifsc.yaml to st,stm32mp25-rifsc.yaml - Fix examples in YAML files - Change feature-domains maxItems to 2 in firewall consumer files as there should not be more than 2 entries for now - Declare "feature-domain-names" as an optional property for firewall controllers child nodes. - Add missing "feature-domains" property declaration in bosch,m_can.yaml and st,stm32-cryp.yaml files firewall framework: - Support multiple entries for "feature-domains" property - Better handle the device-tree parsing using phandle+args APIs - Remove "resource firewall" type - Add a field for the name of the firewall entry - Fix licenses RIFSC: - Add controller name - Driver is now a module_platform_driver - Fix license ETZPC: - Add controller name - Driver is now a module_platform_driver - Fix license Device trees: - Fix rifsc node name - Move the "ranges" property under the "feature-domains" one Oleksii Moisieiev (1): dt-bindings: Document common device controller bindings Gatien Chevallier (10): dt-bindings: treewide: add feature-domains description dt-bindings: bus: document RIFSC dt-bindings: bus: document ETZPC firewall: introduce stm32_firewall framework of: property: fw_devlink: Add support for "feature-domains" bus: rifsc: introduce RIFSC firewall controller driver arm64: dts: st: add RIFSC as a domain controller for STM32MP25x boards bus: etzpc: introduce ETZPC firewall controller driver ARM: dts: stm32: add ETZPC as a system bus for STM32MP15x boards ARM: dts: stm32: add ETZPC as a system bus for STM32MP13x boards .../bindings/bus/st,stm32-etzpc.yaml | 96 + .../bindings/bus/st,stm32mp25-rifsc.yaml | 105 + .../bindings/crypto/st,stm32-cryp.yaml | 4 + .../bindings/crypto/st,stm32-hash.yaml | 4 + .../devicetree/bindings/dma/st,stm32-dma.yaml | 4 + .../bindings/dma/st,stm32-dmamux.yaml | 4 + .../feature-domain-controller.yaml | 84 + .../devicetree/bindings/i2c/st,stm32-i2c.yaml | 4 + .../bindings/iio/adc/st,stm32-adc.yaml | 4 + .../bindings/iio/adc/st,stm32-dfsdm-adc.yaml | 4 + .../bindings/iio/dac/st,stm32-dac.yaml | 4 + .../bindings/media/cec/st,stm32-cec.yaml | 4 + .../bindings/media/st,stm32-dcmi.yaml | 4 + .../memory-controllers/st,stm32-fmc2-ebi.yaml | 4 + .../bindings/mfd/st,stm32-lptimer.yaml | 4 + .../bindings/mfd/st,stm32-timers.yaml | 5 + .../devicetree/bindings/mmc/arm,pl18x.yaml | 4 + .../bindings/net/can/bosch,m_can.yaml | 4 + .../devicetree/bindings/net/stm32-dwmac.yaml | 4 + .../bindings/phy/phy-stm32-usbphyc.yaml | 4 + .../bindings/regulator/st,stm32-vrefbuf.yaml | 4 + .../devicetree/bindings/rng/st,stm32-rng.yaml | 4 + .../bindings/serial/st,stm32-uart.yaml | 4 + .../bindings/sound/st,stm32-i2s.yaml | 4 + .../bindings/sound/st,stm32-sai.yaml | 4 + .../bindings/sound/st,stm32-spdifrx.yaml | 4 + .../bindings/spi/st,stm32-qspi.yaml | 4 + .../devicetree/bindings/spi/st,stm32-spi.yaml | 4 + .../devicetree/bindings/usb/dwc2.yaml | 4 + MAINTAINERS | 7 + arch/arm/boot/dts/st/stm32mp131.dtsi | 1027 +++--- arch/arm/boot/dts/st/stm32mp133.dtsi | 51 +- arch/arm/boot/dts/st/stm32mp13xc.dtsi | 19 +- arch/arm/boot/dts/st/stm32mp13xf.dtsi | 19 +- arch/arm/boot/dts/st/stm32mp151.dtsi | 2757 +++++++++-------- arch/arm/boot/dts/st/stm32mp153.dtsi | 52 +- arch/arm/boot/dts/st/stm32mp15xc.dtsi | 19 +- arch/arm64/Kconfig.platforms | 1 + arch/arm64/boot/dts/st/stm32mp251.dtsi | 7 +- drivers/bus/Kconfig | 9 + drivers/bus/Makefile | 1 + drivers/bus/stm32_etzpc.c | 141 + drivers/bus/stm32_firewall.c | 293 ++ drivers/bus/stm32_firewall.h | 83 + drivers/bus/stm32_rifsc.c | 252 ++ drivers/of/property.c | 2 + include/linux/bus/stm32_firewall_device.h | 141 + 47 files changed, 3352 insertions(+), 1919 deletions(-) create mode 100644 Documentation/devicetree/bindings/bus/st,stm32-etzpc.yaml create mode 100644 Documentation/devicetree/bindings/bus/st,stm32mp25-rifsc.yaml create mode 100644 Documentation/devicetree/bindings/feature-controllers/feature-domain-controller.yaml create mode 100644 drivers/bus/stm32_etzpc.c create mode 100644 drivers/bus/stm32_firewall.c create mode 100644 drivers/bus/stm32_firewall.h create mode 100644 drivers/bus/stm32_rifsc.c create mode 100644 include/linux/bus/stm32_firewall_device.h -- 2.25.1

4 17

[PATCH 0/5] Add the pci_get_base_class() helper and use it
by Sui Jingfeng 28 Sep '23

28 Sep '23

From: Sui Jingfeng <suijingfeng(a)loongson.cn> There is no function that can be used to get all PCI(e) devices in a system by matching against its the PCI base class code only, while keep the sub-class code and the programming interface ignored. Therefore, add the pci_get_base_class() function to suit the need. For example, if an application want to process all PCI(e) display devices in a system, it can achieve such goal by writing the code as following: pdev = NULL; do { pdev = pci_get_base_class(PCI_BASE_CLASS_DISPLAY, pdev); if (!pdev) break; do_something_for_pci_display_device(pdev); } while (1); Sui Jingfeng (5): PCI: Add the pci_get_base_class() helper ALSA: hda/intel: Use pci_get_base_class() to reduce duplicated code drm/nouveau: Use pci_get_base_class() to reduce duplicated code drm/amdgpu: Use pci_get_base_class() to reduce duplicated code drm/radeon: Use pci_get_base_class() to reduce duplicated code drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c | 11 +++------ drivers/gpu/drm/amd/amdgpu/amdgpu_bios.c | 20 ++++----------- drivers/gpu/drm/nouveau/nouveau_acpi.c | 11 +++------ drivers/gpu/drm/radeon/radeon_bios.c | 20 ++++----------- drivers/pci/search.c | 31 ++++++++++++++++++++++++ include/linux/pci.h | 5 ++++ sound/pci/hda/hda_intel.c | 16 ++++-------- 7 files changed, 59 insertions(+), 55 deletions(-) -- 2.34.1

5 9

[PATCH v3 00/11] Introduce STM32 Firewall framework
by Gatien Chevallier 25 Sep '23

25 Sep '23

Introduce STM32 Firewall framework for STM32MP1x and STM32MP2x platforms. STM32MP1x(ETZPC) and STM32MP2x(RIFSC) Firewall controllers register to the framework to offer firewall services such as access granting. This series of patches is a new approach on the previous STM32 system bus, history is available here: https://lore.kernel.org/lkml/20230127164040.1047583/ The need for such framework arises from the fact that there are now multiple hardware firewalls implemented across multiple products. Drivers are shared between different products, using the same code. When it comes to firewalls, the purpose mostly stays the same: Protect hardware resources. But the implementation differs, and there are multiple types of firewalls: peripheral, memory, ... Some hardware firewall controllers such as the RIFSC implemented on STM32MP2x platforms may require to take ownership of a resource before being able to use it, hence the requirement for firewall services to take/release the ownership of such resources. On the other hand, hardware firewall configurations are becoming more and more complex. These mecanisms prevent platform crashes or other firewall-related incoveniences by denying access to some resources. The stm32 firewall framework offers an API that is defined in firewall controllers drivers to best fit the specificity of each firewall. For every peripherals protected by either the ETZPC or the RIFSC, the firewall framework checks the firewall controlelr registers to see if the peripheral's access is granted to the Linux kernel. If not, the peripheral is configured as secure, the node is marked populated, so that the driver is not probed for that device. The firewall framework relies on the feature-domain-controller device tree bindings: https://lore.kernel.org/lkml/0c0a82bb-18ae-d057-562b. It is used by peripherals to reference a domain controller, in this case a firewall feature domain. The bus uses the ID referenced by the feature-domains property to know where to look in the firewall to get the security configuration for the peripheral. This allows a device tree description rather than a hardcoded peripheral table in the bus driver. The STM32 ETZPC device is responsible for filtering accesses based on security level, or co-processor isolation for any resource connected to it. The RIFSC is responsible for filtering accesses based on Compartment ID / security level / privilege level for any resource connected to it. STM32MP13/15/25 SoC device tree files are updated in this series to implement this mecanism. Changes in V2: generic: - Add fw_devlink dependency for "feature-domains" property. bindings: - Corrected YAMLS errors highlighted by Rob's robot - Firewall controllers YAMLs no longer define the maxItems for the "feature-domains" property - Renamed st,stm32-rifsc.yaml to st,stm32mp25-rifsc.yaml - Fix examples in YAML files - Change feature-domains maxItems to 2 in firewall consumer files as there should not be more than 2 entries for now - Declare "feature-domain-names" as an optional property for firewall controllers child nodes. - Add missing "feature-domains" property declaration in bosch,m_can.yaml and st,stm32-cryp.yaml files firewall framework: - Support multiple entries for "feature-domains" property - Better handle the device-tree parsing using phandle+args APIs - Remove "resource firewall" type - Add a field for the name of the firewall entry - Fix licenses RIFSC: - Add controller name - Driver is now a module_platform_driver - Fix license ETZPC: - Add controller name - Driver is now a module_platform_driver - Fix license Device trees: - Fix rifsc node name - Move the "ranges" property under the "feature-domains" one Changes in V3: Change incorrect ordering for bindings commits leading to an error while running "make DT_CHECKER_FLAGS=-m dt_binding_check" Oleksii Moisieiev (1): dt-bindings: Document common device controller bindings Gatien Chevallier (10): dt-bindings: treewide: add feature-domains description dt-bindings: bus: document RIFSC dt-bindings: bus: document ETZPC firewall: introduce stm32_firewall framework of: property: fw_devlink: Add support for "feature-domains" bus: rifsc: introduce RIFSC firewall controller driver arm64: dts: st: add RIFSC as a domain controller for STM32MP25x boards bus: etzpc: introduce ETZPC firewall controller driver ARM: dts: stm32: add ETZPC as a system bus for STM32MP15x boards ARM: dts: stm32: add ETZPC as a system bus for STM32MP13x boards .../bindings/bus/st,stm32-etzpc.yaml | 96 + .../bindings/bus/st,stm32mp25-rifsc.yaml | 105 + .../bindings/crypto/st,stm32-cryp.yaml | 4 + .../bindings/crypto/st,stm32-hash.yaml | 4 + .../devicetree/bindings/dma/st,stm32-dma.yaml | 4 + .../bindings/dma/st,stm32-dmamux.yaml | 4 + .../feature-domain-controller.yaml | 84 + .../devicetree/bindings/i2c/st,stm32-i2c.yaml | 4 + .../bindings/iio/adc/st,stm32-adc.yaml | 4 + .../bindings/iio/adc/st,stm32-dfsdm-adc.yaml | 4 + .../bindings/iio/dac/st,stm32-dac.yaml | 4 + .../bindings/media/cec/st,stm32-cec.yaml | 4 + .../bindings/media/st,stm32-dcmi.yaml | 4 + .../memory-controllers/st,stm32-fmc2-ebi.yaml | 4 + .../bindings/mfd/st,stm32-lptimer.yaml | 4 + .../bindings/mfd/st,stm32-timers.yaml | 5 + .../devicetree/bindings/mmc/arm,pl18x.yaml | 4 + .../bindings/net/can/bosch,m_can.yaml | 4 + .../devicetree/bindings/net/stm32-dwmac.yaml | 4 + .../bindings/phy/phy-stm32-usbphyc.yaml | 4 + .../bindings/regulator/st,stm32-vrefbuf.yaml | 4 + .../devicetree/bindings/rng/st,stm32-rng.yaml | 4 + .../bindings/serial/st,stm32-uart.yaml | 4 + .../bindings/sound/st,stm32-i2s.yaml | 4 + .../bindings/sound/st,stm32-sai.yaml | 4 + .../bindings/sound/st,stm32-spdifrx.yaml | 4 + .../bindings/spi/st,stm32-qspi.yaml | 4 + .../devicetree/bindings/spi/st,stm32-spi.yaml | 4 + .../devicetree/bindings/usb/dwc2.yaml | 4 + MAINTAINERS | 7 + arch/arm/boot/dts/st/stm32mp131.dtsi | 1027 +++--- arch/arm/boot/dts/st/stm32mp133.dtsi | 51 +- arch/arm/boot/dts/st/stm32mp13xc.dtsi | 19 +- arch/arm/boot/dts/st/stm32mp13xf.dtsi | 19 +- arch/arm/boot/dts/st/stm32mp151.dtsi | 2757 +++++++++-------- arch/arm/boot/dts/st/stm32mp153.dtsi | 52 +- arch/arm/boot/dts/st/stm32mp15xc.dtsi | 19 +- arch/arm64/Kconfig.platforms | 1 + arch/arm64/boot/dts/st/stm32mp251.dtsi | 7 +- drivers/bus/Kconfig | 9 + drivers/bus/Makefile | 1 + drivers/bus/stm32_etzpc.c | 141 + drivers/bus/stm32_firewall.c | 288 ++ drivers/bus/stm32_firewall.h | 83 + drivers/bus/stm32_rifsc.c | 252 ++ drivers/of/property.c | 2 + include/linux/bus/stm32_firewall_device.h | 140 + 47 files changed, 3346 insertions(+), 1919 deletions(-) create mode 100644 Documentation/devicetree/bindings/bus/st,stm32-etzpc.yaml create mode 100644 Documentation/devicetree/bindings/bus/st,stm32mp25-rifsc.yaml create mode 100644 Documentation/devicetree/bindings/feature-controllers/feature-domain-controller.yaml create mode 100644 drivers/bus/stm32_etzpc.c create mode 100644 drivers/bus/stm32_firewall.c create mode 100644 drivers/bus/stm32_firewall.h create mode 100644 drivers/bus/stm32_rifsc.c create mode 100644 include/linux/bus/stm32_firewall_device.h -- 2.25.1

4 17

mainline build failure due to ace6d1448138 ("mfd: cs42l43: Add support for cs42l43 core driver")
by Sudip Mukherjee (Codethink) 24 Sep '23

24 Sep '23

Hi All, The latest mainline kernel branch fails to build alpha, csky and s390 allmodconfig with the error: drivers/mfd/cs42l43.c:1138:12: error: 'cs42l43_runtime_resume' defined but not used [-Werror=unused-function] 1138 | static int cs42l43_runtime_resume(struct device *dev) | ^~~~~~~~~~~~~~~~~~~~~~ drivers/mfd/cs42l43.c:1124:12: error: 'cs42l43_runtime_suspend' defined but not used [-Werror=unused-function] 1124 | static int cs42l43_runtime_suspend(struct device *dev) | ^~~~~~~~~~~~~~~~~~~~~~~ drivers/mfd/cs42l43.c:1106:12: error: 'cs42l43_resume' defined but not used [-Werror=unused-function] 1106 | static int cs42l43_resume(struct device *dev) | ^~~~~~~~~~~~~~ drivers/mfd/cs42l43.c:1076:12: error: 'cs42l43_suspend' defined but not used [-Werror=unused-function] 1076 | static int cs42l43_suspend(struct device *dev) | ^~~~~~~~~~~~~~~ git bisect pointed to ace6d1448138 ("mfd: cs42l43: Add support for cs42l43 core driver") I will be happy to test any patch or provide any extra log if needed. -- Regards Sudip

6 7

[PATCH] soundwire: qcom: Log clk_get("iface") failures
by Bjorn Andersson 21 Sep '23

21 Sep '23

Failing to acquire the iface clock makes probing of the Qualcomm SoundWire driver fail without providing any indication to the user. Make the driver log the error to aid debugging system configuration issues. Signed-off-by: Bjorn Andersson <quic_bjorande(a)quicinc.com> --- drivers/soundwire/qcom.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/soundwire/qcom.c b/drivers/soundwire/qcom.c index 55be9f4b8d59..e51b1dfce82d 100644 --- a/drivers/soundwire/qcom.c +++ b/drivers/soundwire/qcom.c @@ -1550,7 +1550,7 @@ static int qcom_swrm_probe(struct platform_device *pdev) ctrl->hclk = devm_clk_get(dev, "iface"); if (IS_ERR(ctrl->hclk)) { - ret = PTR_ERR(ctrl->hclk); + ret = dev_err_probe(dev, PTR_ERR(ctrl->hclk), "unable to get iface clock\n"); goto err_init; } -- 2.25.1

3 2

[PATCH 1/2] soundwire: qcom: use newer link status tregister on v2.0.0
by Krzysztof Kozlowski 21 Sep '23

21 Sep '23

Soundwire v2.0.0 comes with a new register LINK_STATUS for the FRAME_GEN_ENABLED field (bit indicating that an active frame is running). The old register COMP_STATUS is still there and still works, although the new one is preferred in downstream sources. Probably because it allows to choose Soundwire instance per CPU. Most of the code allowing to use new register for Soundwire v2.0.0 was already there as part of commit 312355a6a9f6 ("soundwire: qcom: add support for v2.0.0 controller"), so switch to it in swrm_wait_for_frame_gen_enabled() function. This should not have functional impact, because the old register still behaves correctly. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski(a)linaro.org> --- drivers/soundwire/qcom.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/soundwire/qcom.c b/drivers/soundwire/qcom.c index f8fd2eb4a2bb..3ae3e5896308 100644 --- a/drivers/soundwire/qcom.c +++ b/drivers/soundwire/qcom.c @@ -817,8 +817,8 @@ static bool swrm_wait_for_frame_gen_enabled(struct qcom_swrm_ctrl *ctrl) int comp_sts; do { - ctrl->reg_read(ctrl, SWRM_COMP_STATUS, &comp_sts); - + ctrl->reg_read(ctrl, ctrl->reg_layout[SWRM_REG_FRAME_GEN_ENABLED], + &comp_sts); if (comp_sts & SWRM_FRM_GEN_ENABLED) return true; -- 2.34.1

2 2

[PATCH 0/6] ASoC: codecs: msm8916-wcd-analog: Cleanup DT bindings
by Stephan Gerhold 20 Sep '23

20 Sep '23

Drop the redundant reg-names and mclk from the PM8916 analog codec. Having the mclk on the analog codec is incorrect because only the digital codec consumes it directly. Signed-off-by: Stephan Gerhold <stephan(a)gerhold.net> --- Stephan Gerhold (6): ASoC: dt-bindings: pm8916-analog-codec: Fix misleading example ASoC: dt-bindings: pm8916-analog-codec: Drop pointless reg-names ASoC: dt-bindings: pm8916-analog-codec: Drop invalid mclk ASoC: codecs: msm8916-wcd-analog: Drop invalid mclk ASoC: codecs: msm8916-wcd-analog: Properly handle probe errors arm64: dts: qcom: pm8916: Drop codec reg-names and mclk .../sound/qcom,pm8916-wcd-analog-codec.yaml | 101 ++++++++++----------- arch/arm64/boot/dts/qcom/apq8016-sbc.dts | 2 - arch/arm64/boot/dts/qcom/pm8916.dtsi | 3 - sound/soc/codecs/msm8916-wcd-analog.c | 56 +++--------- 4 files changed, 62 insertions(+), 100 deletions(-) --- base-commit: 78b31c16983bb9e540d5a14540417275e6f3f4a5 change-id: 20230712-pm8916-mclk-dbc17169c598 Best regards, -- Stephan Gerhold <stephan(a)gerhold.net>

4 11

[PATCH v4 00/28] Add support for QMC HDLC, framer infrastruture and PEF2256 framer (v4)
by Christophe Leroy 20 Sep '23

20 Sep '23

From: Herve Codina <herve.codina(a)bootlin.com> Hi, TLDR: This is a resend of v3 with a build failure fix in patch 21. No other changes. I have a system where I need to handle an HDLC interface and some audio data. The HDLC data are transferred using a TDM bus on which a PEF2256 (E1/T1 framer) is present. The PEF2256 transfers data from/to the TDM bus to/from the E1 line. This PEF2256 is connected to a PowerQUICC SoC for the control path and the TDM is connected to the SoC (QMC component) for the data path. From the QMC HDLC driver, I need to handle HDLC data using the QMC, carrier detection using the PEF2256 (E1 line carrier) and set/get some PEF2256 configuration. The QMC HDLC driver considers the PEF2256 as a generic framer. It performs operations that involve the PEF2256 through the generic framer API. The audio data are exchanged with the PEF2256 using a CPU DAI connected to the TDM bus through the QMC and the PEF2256 needs to be seen as a codec in order to be linked to the CPU DAI. The codec handles the carrier detection using the PEF2256 and reports the carrier state to the ALSA subsystem using the ASoC jack detection. The codec, even if instantiated by the PEF2256 driver, considers the PEF2256 as a generic framer. The generic framer has: - 2 consumers (QMC HDLC drv and codec) - 1 provider (PEF2256) So, the design is the following: +------------------+ +---------+ | QMC | <- TDM -> | PEF2256 | <-> E1 +---------+ | +-------------+ | | | | CPU DAI | <-data--> | QMC channel | | | | +---------+ | +-------------+ | | | +--------------+ | +-------------+ | | | | QMC HDLC drv | <-data--> | QMC channel | | | | +--------------+ | +-------------+ | | | ^ +------------------+ | | | +--------+ +-------------+ | | +-> | framer | <-> | PEF2256 drv | <- local bus ->| | | | | | +---------+ +-> | | | | | +--------+ | +-------+ | +-------------------> | codec | | | +-------+ | +-------------+ Further more, the TDM timeslots used by the QMC HDLC driver need to be configured at runtime (QMC dynamic timeslots). Several weeks ago, I sent two series related to this topic: - Add the Lantiq PEF2256 audio support [1] - RFC Add support for QMC HDLC and PHY [2] This current series is a rework of these two series taking into account feedbacks previously received. In order to implement all of this, I do the following: 1) Perform some fixes (patches 1, 2, 3, 4) 2) Introduce the QMC HDLC driver (patches 5, 6, 7) 3) Add QMC dynamic timeslot support (patches 8 - 18) 4) Add timeslots change support in QMC HDLC (patch 19) 5) Introduce framer infrastructure (patch 20) 6) Add PEF2256 framer provider (patches 11, 22, 23, 24, 25) 7) Add framer codec as a framer consumer (patch 26) 8) Add framer support as a framer consumer in QMC HDLC (patch 27, 28) The series contains the full story and detailed modifications. If needed, the series can be split and/or commmits can be squashed. Let me know. Compare to the previous iteration https://lore.kernel.org/linux-kernel/20230726150225.483464-1-herve.codina@b… This v3 series mainly: - Fixes some implementation details. - Adds a new patch (patch 5) to remove existing inline keyword in the QMC driver. - Squashes patches related to the QMC HDLC binding together. Best regards, Hervé [1]: https://lore.kernel.org/all/20230417171601.74656-1-herve.codina@bootlin.com/ [2]: https://lore.kernel.org/all/20230323103154.264546-1-herve.codina@bootlin.co… Changes v3 -> v4 - Fixes build failure with CONFIG_MODULES in patch 21 (net: wan: Add framer framework support) Changes v2 -> v3 - Patches 1, 2, 3, 4 Add 'Reviewed-by: Christophe Leroy <christophe.leroy(a)csgroup.eu>' - New patch Remove inline keyword from the existing registers accessors helpers - Patch 6 (patches 5, 27 in v2) Update the binding title Squash patch 27 - Patch 7 (patch 6 in v2) Remove the cast in netdev_to_qmc_hdlc() Add 'Reviewed-by: Christophe Leroy <christophe.leroy(a)csgroup.eu>' - Patch 8 (patch 7 in v2): No change - Patches 9, 10 (patches 8, 9 in v2) Add 'Reviewed-by: Christophe Leroy <christophe.leroy(a)csgroup.eu>' - Patch 11 (patch 10 in v2) Remove inline keyword from the introduced qmc_clrsetbits16() helper Add 'Reviewed-by: Christophe Leroy <christophe.leroy(a)csgroup.eu>' - Patches 12, 13, 14, 15, 16, 17, 18, 19, 20 Add 'Reviewed-by: Christophe Leroy <christophe.leroy(a)csgroup.eu>' - Patch 21 (patch 20 in v2) Remove unneeded framer NULL pointer check Add 'Reviewed-by: Christophe Leroy <christophe.leroy(a)csgroup.eu>' - Patch 22 (patch 21 in v2) Change sclkr and sclkx clocks description Remove the framer phandle property from the framer subnodes (ie. from framer-codec nodes) - Patch 23 (patch 22 in v2) Initialize 'disabled' variable at declaration Fix commit log Add 'Reviewed-by: Christophe Leroy <christophe.leroy(a)csgroup.eu>' - Patch 24 (patch 23 in v2) Remove inline keyword from the existing registers accessors helpers Use dev_warn_ratelimited() in default interrupt handler Add 'Reviewed-by: Christophe Leroy <christophe.leroy(a)csgroup.eu>' - Patch 25 (patch 24 in v2) Replace #include "linux/bitfield.h" by #include <linux/bitfield.h> Fold the pinctrl anonymous struct into the struct pef2256_pinctrl Update commit log Add 'Reviewed-by: Christophe Leroy <christophe.leroy(a)csgroup.eu>' - Patch 26 (patch 25 in v2) Add 'Reviewed-by: Christophe Leroy <christophe.leroy(a)csgroup.eu>' - Patch 27 (patch 26 in v2) Fix error message Changed the ch.max computation in framer_dai_hw_rule_channels_by_format() Add 'Reviewed-by: Christophe Leroy <christophe.leroy(a)csgroup.eu>' - Patch 28 Add 'Reviewed-by: Christophe Leroy <christophe.leroy(a)csgroup.eu>' Changes v1 -> v2 - Patches 1, 2 (New in v2) Fix __iomem addresses declaration - Patch 19 (17 in v1) Fix a compilation warning - Patch 26 (24 in v1) Fix a typo in Kconfig file Fix issues raised by sparse (make C=1) Herve Codina (28): soc: fsl: cpm1: tsa: Fix __iomem addresses declaration soc: fsl: cpm1: qmc: Fix __iomem addresses declaration soc: fsl: cpm1: qmc: Fix rx channel reset soc: fsl: cpm1: qmc: Extend the API to provide Rx status soc: fsl: cpm1: qmc: Remove inline function specifiers dt-bindings: net: Add support for QMC HDLC net: wan: Add support for QMC HDLC MAINTAINERS: Add the Freescale QMC HDLC driver entry soc: fsl: cpm1: qmc: Introduce available timeslots masks soc: fsl: cpm1: qmc: Rename qmc_setup_tsa* to qmc_init_tsa* soc: fsl: cpm1: qmc: Introduce qmc_chan_setup_tsa* soc: fsl: cpm1: qmc: Remove no more needed checks from qmc_check_chans() soc: fsl: cpm1: qmc: Check available timeslots in qmc_check_chans() soc: fsl: cpm1: qmc: Add support for disabling channel TSA entries soc: fsl: cpm1: qmc: Split Tx and Rx TSA entries setup soc: fsl: cpm1: qmc: Introduce is_tsa_64rxtx flag soc: fsl: cpm1: qmc: Handle timeslot entries at channel start() and stop() soc: fsl: cpm1: qmc: Remove timeslots handling from setup_chan() soc: fsl: cpm1: qmc: Introduce functions to change timeslots at runtime wan: qmc_hdlc: Add runtime timeslots changes support net: wan: Add framer framework support dt-bindings: net: Add the Lantiq PEF2256 E1/T1/J1 framer mfd: core: Ensure disabled devices are skiped without aborting net: wan: framer: Add support for the Lantiq PEF2256 framer pinctrl: Add support for the Lantic PEF2256 pinmux MAINTAINERS: Add the Lantiq PEF2256 driver entry ASoC: codecs: Add support for the framer codec net: wan: fsl_qmc_hdlc: Add framer support .../devicetree/bindings/net/fsl,qmc-hdlc.yaml | 46 + .../bindings/net/lantiq,pef2256.yaml | 219 +++++ MAINTAINERS | 17 + drivers/mfd/mfd-core.c | 17 +- drivers/net/wan/Kconfig | 14 + drivers/net/wan/Makefile | 3 + drivers/net/wan/framer/Kconfig | 35 + drivers/net/wan/framer/Makefile | 7 + drivers/net/wan/framer/framer-core.c | 886 ++++++++++++++++++ drivers/net/wan/framer/pef2256/Makefile | 8 + drivers/net/wan/framer/pef2256/pef2256-regs.h | 250 +++++ drivers/net/wan/framer/pef2256/pef2256.c | 880 +++++++++++++++++ drivers/net/wan/fsl_qmc_hdlc.c | 820 ++++++++++++++++ drivers/pinctrl/Kconfig | 14 + drivers/pinctrl/Makefile | 1 + drivers/pinctrl/pinctrl-pef2256-regs.h | 65 ++ drivers/pinctrl/pinctrl-pef2256.c | 308 ++++++ drivers/soc/fsl/qe/qmc.c | 501 ++++++++-- drivers/soc/fsl/qe/tsa.c | 22 +- include/linux/framer/framer-provider.h | 194 ++++ include/linux/framer/framer.h | 199 ++++ include/linux/framer/pef2256.h | 31 + include/soc/fsl/qe/qmc.h | 25 +- sound/soc/codecs/Kconfig | 15 + sound/soc/codecs/Makefile | 2 + sound/soc/codecs/framer-codec.c | 413 ++++++++ sound/soc/fsl/fsl_qmc_audio.c | 2 +- 27 files changed, 4872 insertions(+), 122 deletions(-) create mode 100644 Documentation/devicetree/bindings/net/fsl,qmc-hdlc.yaml create mode 100644 Documentation/devicetree/bindings/net/lantiq,pef2256.yaml create mode 100644 drivers/net/wan/framer/Kconfig create mode 100644 drivers/net/wan/framer/Makefile create mode 100644 drivers/net/wan/framer/framer-core.c create mode 100644 drivers/net/wan/framer/pef2256/Makefile create mode 100644 drivers/net/wan/framer/pef2256/pef2256-regs.h create mode 100644 drivers/net/wan/framer/pef2256/pef2256.c create mode 100644 drivers/net/wan/fsl_qmc_hdlc.c create mode 100644 drivers/pinctrl/pinctrl-pef2256-regs.h create mode 100644 drivers/pinctrl/pinctrl-pef2256.c create mode 100644 include/linux/framer/framer-provider.h create mode 100644 include/linux/framer/framer.h create mode 100644 include/linux/framer/pef2256.h create mode 100644 sound/soc/codecs/framer-codec.c -- 2.41.0

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