November 2022 - Alsa-devel - mailman.alsa-project.org

[PATCH] ASoC: SOF: fix compilation issue with readb/writeb helpers
by Pierre-Louis Bossart 01 Nov '22

01 Nov '22

Replace them with read8/write8 to avoid compilation issue on ARM. In hindsight this is more consistent with the read64/write64 helpers already used in SOF. Reported-by: Nathan Chancellor <nathan(a)kernel.org> Link: https://lore.kernel.org/alsa-devel/Y1rTFrohLqaiZAy%2F@dev-arch.thelio-3990X/ Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart(a)linux.intel.com> --- sound/soc/sof/intel/hda-dsp.c | 6 +++--- sound/soc/sof/intel/hda-stream.c | 2 +- sound/soc/sof/intel/hda.c | 2 +- sound/soc/sof/ops.h | 18 +++++++++--------- sound/soc/sof/sof-priv.h | 4 ++-- 5 files changed, 16 insertions(+), 16 deletions(-) diff --git a/sound/soc/sof/intel/hda-dsp.c b/sound/soc/sof/intel/hda-dsp.c index c61bab1a5719..6d5c26a2147e 100644 --- a/sound/soc/sof/intel/hda-dsp.c +++ b/sound/soc/sof/intel/hda-dsp.c @@ -349,7 +349,7 @@ static int hda_dsp_wait_d0i3c_done(struct snd_sof_dev *sdev) { int retry = HDA_DSP_REG_POLL_RETRY_COUNT; - while (snd_sof_dsp_readb(sdev, HDA_DSP_HDA_BAR, SOF_HDA_VS_D0I3C) & SOF_HDA_VS_D0I3C_CIP) { + while (snd_sof_dsp_read8(sdev, HDA_DSP_HDA_BAR, SOF_HDA_VS_D0I3C) & SOF_HDA_VS_D0I3C_CIP) { if (!retry--) return -ETIMEDOUT; usleep_range(10, 15); @@ -389,7 +389,7 @@ static int hda_dsp_update_d0i3c_register(struct snd_sof_dev *sdev, u8 value) } /* Update D0I3C register */ - snd_sof_dsp_updateb(sdev, HDA_DSP_HDA_BAR, + snd_sof_dsp_update8(sdev, HDA_DSP_HDA_BAR, SOF_HDA_VS_D0I3C, SOF_HDA_VS_D0I3C_I3, value); /* Wait for cmd in progress to be cleared before exiting the function */ @@ -399,7 +399,7 @@ static int hda_dsp_update_d0i3c_register(struct snd_sof_dev *sdev, u8 value) return ret; } - reg = snd_sof_dsp_readb(sdev, HDA_DSP_HDA_BAR, SOF_HDA_VS_D0I3C); + reg = snd_sof_dsp_read8(sdev, HDA_DSP_HDA_BAR, SOF_HDA_VS_D0I3C); trace_sof_intel_D0I3C_updated(sdev, reg); return 0; diff --git a/sound/soc/sof/intel/hda-stream.c b/sound/soc/sof/intel/hda-stream.c index 8e3f05857632..7f0fd05a96e6 100644 --- a/sound/soc/sof/intel/hda-stream.c +++ b/sound/soc/sof/intel/hda-stream.c @@ -455,7 +455,7 @@ int hda_dsp_iccmax_stream_hw_params(struct snd_sof_dev *sdev, struct hdac_ext_st mask, mask); /* Follow HW recommendation to set the guardband value to 95us during FW boot */ - snd_sof_dsp_updateb(sdev, HDA_DSP_HDA_BAR, HDA_VS_INTEL_LTRP, + snd_sof_dsp_update8(sdev, HDA_DSP_HDA_BAR, HDA_VS_INTEL_LTRP, HDA_VS_INTEL_LTRP_GB_MASK, HDA_LTRP_GB_VALUE_US); /* start DMA */ diff --git a/sound/soc/sof/intel/hda.c b/sound/soc/sof/intel/hda.c index 99be5ef78324..348fbfb6a2c2 100644 --- a/sound/soc/sof/intel/hda.c +++ b/sound/soc/sof/intel/hda.c @@ -630,7 +630,7 @@ void hda_ipc_irq_dump(struct snd_sof_dev *sdev) intsts = snd_sof_dsp_read(sdev, HDA_DSP_HDA_BAR, SOF_HDA_INTSTS); intctl = snd_sof_dsp_read(sdev, HDA_DSP_HDA_BAR, SOF_HDA_INTCTL); ppsts = snd_sof_dsp_read(sdev, HDA_DSP_PP_BAR, SOF_HDA_REG_PP_PPSTS); - rirbsts = snd_sof_dsp_readb(sdev, HDA_DSP_HDA_BAR, AZX_REG_RIRBSTS); + rirbsts = snd_sof_dsp_read8(sdev, HDA_DSP_HDA_BAR, AZX_REG_RIRBSTS); dev_err(sdev->dev, "hda irq intsts 0x%8.8x intlctl 0x%8.8x rirb %2.2x\n", intsts, intctl, rirbsts); diff --git a/sound/soc/sof/ops.h b/sound/soc/sof/ops.h index 8cb93e7c0c67..c52752250565 100644 --- a/sound/soc/sof/ops.h +++ b/sound/soc/sof/ops.h @@ -302,11 +302,11 @@ static inline int snd_sof_debugfs_add_region_item(struct snd_sof_dev *sdev, } /* register IO */ -static inline void snd_sof_dsp_writeb(struct snd_sof_dev *sdev, u32 bar, +static inline void snd_sof_dsp_write8(struct snd_sof_dev *sdev, u32 bar, u32 offset, u8 value) { - if (sof_ops(sdev)->writeb) - sof_ops(sdev)->writeb(sdev, sdev->bar[bar] + offset, value); + if (sof_ops(sdev)->write8) + sof_ops(sdev)->write8(sdev, sdev->bar[bar] + offset, value); else writeb(value, sdev->bar[bar] + offset); } @@ -329,11 +329,11 @@ static inline void snd_sof_dsp_write64(struct snd_sof_dev *sdev, u32 bar, writeq(value, sdev->bar[bar] + offset); } -static inline u8 snd_sof_dsp_readb(struct snd_sof_dev *sdev, u32 bar, +static inline u8 snd_sof_dsp_read8(struct snd_sof_dev *sdev, u32 bar, u32 offset) { - if (sof_ops(sdev)->readb) - return sof_ops(sdev)->readb(sdev, sdev->bar[bar] + offset); + if (sof_ops(sdev)->read8) + return sof_ops(sdev)->read8(sdev, sdev->bar[bar] + offset); else return readb(sdev->bar[bar] + offset); } @@ -356,15 +356,15 @@ static inline u64 snd_sof_dsp_read64(struct snd_sof_dev *sdev, u32 bar, return readq(sdev->bar[bar] + offset); } -static inline void snd_sof_dsp_updateb(struct snd_sof_dev *sdev, u32 bar, +static inline void snd_sof_dsp_update8(struct snd_sof_dev *sdev, u32 bar, u32 offset, u8 value, u8 mask) { u8 reg; - reg = snd_sof_dsp_readb(sdev, bar, offset); + reg = snd_sof_dsp_read8(sdev, bar, offset); reg &= ~mask; reg |= value; - snd_sof_dsp_writeb(sdev, bar, offset, reg); + snd_sof_dsp_write8(sdev, bar, offset, reg); } /* block IO */ diff --git a/sound/soc/sof/sof-priv.h b/sound/soc/sof/sof-priv.h index 876e6fdbef4f..0ad48d73d1f7 100644 --- a/sound/soc/sof/sof-priv.h +++ b/sound/soc/sof/sof-priv.h @@ -174,9 +174,9 @@ struct snd_sof_dsp_ops { * TODO: consider removing these operations and calling respective * implementations directly */ - void (*writeb)(struct snd_sof_dev *sof_dev, void __iomem *addr, + void (*write8)(struct snd_sof_dev *sof_dev, void __iomem *addr, u8 value); /* optional */ - u8 (*readb)(struct snd_sof_dev *sof_dev, + u8 (*read8)(struct snd_sof_dev *sof_dev, void __iomem *addr); /* optional */ void (*write)(struct snd_sof_dev *sof_dev, void __iomem *addr, u32 value); /* optional */ -- 2.34.1

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[PATCH] ALSA: hda: clarify comments on SCF changes
by Pierre-Louis Bossart 01 Nov '22

01 Nov '22

The commit 1f9d3d98694b1 ("ALSA: hda - set intel audio clock to a proper value") added a number of misleading comments. There is no ability to detect if an SCF value was set or not, what the code does is prevent the use of the 6MHz audio clock represented by the value 0 in LCTL.SCF. Changing the SCF settings does require the link to be power-cycled, but in all other cases the link is powered automatically when exiting reset. In other words, the power-cycle is an exception to the rule that the HDaudio legacy driver does not need to program SPA/CPA bits. In addition, the SCF related changes are only relevant for the first link. No functionality change, only comment clarifications. Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart(a)linux.intel.com> Reviewed-by: Ranjani Sridharan <ranjani.sridharan(a)linux.intel.com> Reviewed-by: Rander Wang <rander.wang(a)intel.com> --- sound/pci/hda/hda_intel.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/sound/pci/hda/hda_intel.c b/sound/pci/hda/hda_intel.c index 6ff19dd0d10c..92f66bbc5c91 100644 --- a/sound/pci/hda/hda_intel.c +++ b/sound/pci/hda/hda_intel.c @@ -485,8 +485,8 @@ static int intel_ml_lctl_set_power(struct azx *chip, int state) int timeout; /* - * the codecs are sharing the first link setting by default - * If other links are enabled for stream, they need similar fix + * Changes to LCTL.SCF are only needed for the first multi-link dealing + * with external codecs */ val = readl(bus->mlcap + AZX_ML_BASE + AZX_REG_ML_LCTL); val &= ~AZX_ML_LCTL_SPA; @@ -513,7 +513,7 @@ static void intel_init_lctl(struct azx *chip) /* 0. check lctl register value is correct or not */ val = readl(bus->mlcap + AZX_ML_BASE + AZX_REG_ML_LCTL); - /* if SCF is already set, let's use it */ + /* only perform additional configurations if the SCF is initially based on 6MHz */ if ((val & AZX_ML_LCTL_SCF) != 0) return; @@ -531,7 +531,7 @@ static void intel_init_lctl(struct azx *chip) if (ret) goto set_spa; - /* 2. update SCF to select a properly audio clock*/ + /* 2. update SCF to select an audio clock different from 6MHz */ val &= ~AZX_ML_LCTL_SCF; val |= intel_get_lctl_scf(chip); writel(val, bus->mlcap + AZX_ML_BASE + AZX_REG_ML_LCTL); -- 2.34.1

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[PATCH v1 0/2] Add optional dmic selection for two DMICs
by Ajye Huang 01 Nov '22

01 Nov '22

v2: - Documentation: Add dmic_sel-gpios optional prop for two DMICs. - dmic codec driver: - "dmic_sel-gpios" property is used for a mixer control to switch the dmic signal source between the Front and Rear Dmic. Thanks for the review! Ajye Huang (2): ASoC: dt-bindings: Document dmic_sel-gpios optional prop for two DMICs case ASoC: dmic: Add optional dmic selection .../devicetree/bindings/sound/dmic-codec.yaml | 5 ++ sound/soc/codecs/dmic.c | 52 +++++++++++++++++++ 2 files changed, 57 insertions(+) -- 2.25.1

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