November 2021 - Alsa-devel - mailman.alsa-project.org

[PATCH v3] ASoC: dt-bindings: davinci-mcasp: convert McASP bindings to yaml schema
by Jayesh Choudhary 29 Nov '21

29 Nov '21

Convert the bindings for McASP controllers for TI SOCs from txt to YAML schema. Adds additional properties 'clocks', 'clock-names', 'power-domains', '#sound-dai-cells', 'num-serializer' and 'port' which were not there in the txt file. Adds 'dmas' and 'dma-names' in the example which were not there in the txt file. Changes 'interrupts' and 'interrupt-names' from optional to required properties. Signed-off-by: Jayesh Choudhary <j-choudhary(a)ti.com> --- Changelog: v3: - removes maxItems from 'clock-names' v2: - changes the commit message - modifies the properties 'clocks', 'clock-names', 'dma-names', 'dmas', 'interrupts' and 'interrupt-names' according to the arm SOCs - adds 'port' and 'num-serializer' as node properties .../bindings/sound/davinci-mcasp-audio.txt | 86 --------- .../bindings/sound/davinci-mcasp-audio.yaml | 178 ++++++++++++++++++ 2 files changed, 178 insertions(+), 86 deletions(-) delete mode 100644 Documentation/devicetree/bindings/sound/davinci-mcasp-audio.txt create mode 100644 Documentation/devicetree/bindings/sound/davinci-mcasp-audio.yaml diff --git a/Documentation/devicetree/bindings/sound/davinci-mcasp-audio.txt b/Documentation/devicetree/bindings/sound/davinci-mcasp-audio.txt deleted file mode 100644 index bd863bd69501..000000000000 --- a/Documentation/devicetree/bindings/sound/davinci-mcasp-audio.txt +++ /dev/null @@ -1,86 +0,0 @@ -Texas Instruments McASP controller - -Required properties: -- compatible : - "ti,dm646x-mcasp-audio" : for DM646x platforms - "ti,da830-mcasp-audio" : for both DA830 & DA850 platforms - "ti,am33xx-mcasp-audio" : for AM33xx platforms (AM33xx, AM43xx, TI81xx) - "ti,dra7-mcasp-audio" : for DRA7xx platforms - "ti,omap4-mcasp-audio" : for OMAP4 - -- reg : Should contain reg specifiers for the entries in the reg-names property. -- reg-names : Should contain: - * "mpu" for the main registers (required). For compatibility with - existing software, it is recommended this is the first entry. - * "dat" for separate data port register access (optional). -- op-mode : I2S/DIT ops mode. 0 for I2S mode. 1 for DIT mode used for S/PDIF, - IEC60958-1, and AES-3 formats. -- tdm-slots : Slots for TDM operation. Indicates number of channels transmitted - or received over one serializer. -- serial-dir : A list of serializer configuration. Each entry is a number - indication for serializer pin direction. - (0 - INACTIVE, 1 - TX, 2 - RX) -- dmas: two element list of DMA controller phandles and DMA request line - ordered pairs. -- dma-names: identifier string for each DMA request line in the dmas property. - These strings correspond 1:1 with the ordered pairs in dmas. The dma - identifiers must be "rx" and "tx". - -Optional properties: - -- ti,hwmods : Must be "mcasp<n>", n is controller instance starting 0 -- tx-num-evt : FIFO levels. -- rx-num-evt : FIFO levels. -- dismod : Specify the drive on TX pin during inactive slots - 0 : 3-state - 2 : logic low - 3 : logic high - Defaults to 'logic low' when the property is not present -- sram-size-playback : size of sram to be allocated during playback -- sram-size-capture : size of sram to be allocated during capture -- interrupts : Interrupt numbers for McASP -- interrupt-names : Known interrupt names are "tx" and "rx" -- pinctrl-0: Should specify pin control group used for this controller. -- pinctrl-names: Should contain only one value - "default", for more details - please refer to pinctrl-bindings.txt -- fck_parent : Should contain a valid clock name which will be used as parent - for the McASP fck -- auxclk-fs-ratio: When McASP is bus master indicates the ratio between AUCLK - and FS rate if applicable: - AUCLK rate = auxclk-fs-ratio * FS rate - -Optional GPIO support: -If any McASP pin need to be used as GPIO then the McASP node must have: -... - gpio-controller - #gpio-cells = <2>; -... - -When requesting a GPIO, the first parameter is the PIN index in McASP_P* -registers. -For example to request the AXR2 pin of mcasp8: -function-gpios = <&mcasp8 2 0>; - -Or to request the ACLKR pin of mcasp8: -function-gpios = <&mcasp8 29 0>; - -For generic gpio information, please refer to bindings/gpio/gpio.txt - -Example: - -mcasp0: mcasp0@1d00000 { - compatible = "ti,da830-mcasp-audio"; - reg = <0x100000 0x3000>; - reg-names "mpu"; - interrupts = <82>, <83>; - interrupt-names = "tx", "rx"; - op-mode = <0>; /* MCASP_IIS_MODE */ - tdm-slots = <2>; - serial-dir = < - 0 0 0 0 /* 0: INACTIVE, 1: TX, 2: RX */ - 0 0 0 0 - 0 0 0 1 - 2 0 0 0 >; - tx-num-evt = <1>; - rx-num-evt = <1>; -}; diff --git a/Documentation/devicetree/bindings/sound/davinci-mcasp-audio.yaml b/Documentation/devicetree/bindings/sound/davinci-mcasp-audio.yaml new file mode 100644 index 000000000000..c4d3f56470bf --- /dev/null +++ b/Documentation/devicetree/bindings/sound/davinci-mcasp-audio.yaml @@ -0,0 +1,178 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/sound/davinci-mcasp-audio.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: McASP Controller for TI SoCs + +maintainers: + - Jayesh Choudhary <j-choudhary(a)ti.com> + +properties: + compatible: + enum: + - ti,dm646x-mcasp-audio + - ti,da830-mcasp-audio + - ti,am33xx-mcasp-audio + - ti,dra7-mcasp-audio + - ti,omap4-mcasp-audio + + reg: + minItems: 1 + items: + - description: main registers + - description: data port register + + reg-names: + minItems: 1 + items: + - const: mpu + - const: dat + + op-mode: + description: I2S - 0 or DIT - 1 mode + enum: + - 0 + - 1 + + tdm-slots: + maxItems: 1 + + serial-dir: + description: + A list of serializer configuration + Entry is indication for serializer pin direction + 0 - Inactive, 1 - TX, 2 - RX + $ref: /schemas/types.yaml#/definitions/uint32-array + minItems: 1 + maxItems: 16 + items: + minimum: 0 + maximum: 2 + default: 0 + + dmas: + minItems: 1 + items: + - description: transmission DMA channel + - description: reception DMA channel + + dma-names: + minItems: 1 + items: + - const: tx + - const: rx + + ti,hwmods: + $ref: /schemas/types.yaml#/definitions/string + description: Name of hwmod associated with McASP + maxItems: 1 + deprecated: true + + tx-num-evt: + maxItems: 1 + + rx-num-evt: + maxItems: 1 + + dismod: + enum: + - 0 + - 2 + - 3 + default: 2 + + sram-size-playback: + maxItems: 1 + + sram-size-capture: + maxItems: 1 + + interrupts: + minItems: 1 + items: + - description: TX FIFO interrupt + - description: RX FIFO interrupt + + interrupt-names: + oneOf: + - minItems: 1 + items: + - const: tx + - const: rx + - const: common + + fck_parent: + description: parent clock for McASP fck + maxItems: 1 + + auxclk-fs-ratio: + description: ratio of AUCLK and FS if applicable + maxItems: 1 + + gpio-controller: true + + "#gpio-cells": + const: 2 + + function-gpios: + maxItems: 1 + + clocks: + minItems: 1 + maxItems: 3 + + clock-names: + minItems: 1 + items: + - const: fck + - const: ahclkx + - const: ahclkr + + power-domains: + maxItems: 1 + + "#sound-dai-cells": + const: 0 + + num-serializer: + maxItems: 1 + + port: + type: object + +required: + - compatible + - reg + - reg-names + - dmas + - dma-names + - interrupts + - interrupt-names + - serial-dir + - op-mode + - tdm-slots + +additionalProperties: false + +examples: + - | + mcasp0: mcasp0@1d00000 { + compatible = "ti,da830-mcasp-audio"; + reg = <0x100000 0x3000>; + reg-names = "mpu"; + interrupts = <82>, <83>; + interrupt-names = "tx", "rx"; + op-mode = <0>; /* MCASP_IIS_MODE */ + tdm-slots = <2>; + dmas = <&main_udmap 0xc400>, <&main_udmap 0x4400>; + dma-names = "tx", "rx"; + serial-dir = < + 0 0 0 0 /* 0: INACTIVE, 1: TX, 2: RX */ + 0 0 0 0 + 0 0 0 1 + 2 0 0 0 >; + tx-num-evt = <1>; + rx-num-evt = <1>; + }; -- 2.17.1

3 5

[PATCH 0/5] ASoC: soc-pcm: tidyup soc_pcm_pointer()'s delay update method
by Kuninori Morimoto 29 Nov '21

29 Nov '21

Hi Mark Current soc_pcm_pointer() is checking runtime->delay, but it might be updated silently by component's .point callback. It is strange and difficult to find/know the issue. This patch adds .delay callback for component, and solve the issue. Kuninori Morimoto (5): ASoC: soc-dai: update snd_soc_dai_delay() to snd_soc_pcm_dai_delay() ASoC: soc-component: add snd_soc_pcm_component_delay() ASoC: amd: acp-pcm-dma: add .delay support ASoC: intel: sst-mfld-platform-pcm: add .delay support ASoC: soc-pcm: tidyup soc_pcm_pointer()'s delay update method include/sound/soc-component.h | 4 ++ include/sound/soc-dai.h | 4 +- sound/soc/amd/acp-pcm-dma.c | 15 +++++++- sound/soc/amd/acp.h | 1 + sound/soc/intel/atom/sst-mfld-platform-pcm.c | 14 ++++++- sound/soc/soc-component.c | 28 ++++++++++++++ sound/soc/soc-dai.c | 40 ++++++++++++++------ sound/soc/soc-pcm.c | 29 +++----------- 8 files changed, 95 insertions(+), 40 deletions(-) -- 2.25.1

3 12

[PATCH v2] ASoC: sunxi: sun4i-spdif: Implement IEC958 control
by Jernej Skrabec 29 Nov '21

29 Nov '21

SPDIF core is capable of sending custom status. Implement IEC958 control handling. Signed-off-by: Jernej Skrabec <jernej.skrabec(a)gmail.com> --- Changes from v1: - return 1 if there was a change in sun4i_spdif_set_status() - added locking for reading and writing status sound/soc/sunxi/sun4i-spdif.c | 115 ++++++++++++++++++++++++++++++++++ 1 file changed, 115 insertions(+) diff --git a/sound/soc/sunxi/sun4i-spdif.c b/sound/soc/sunxi/sun4i-spdif.c index a10949bf0ca1..17090f43150e 100644 --- a/sound/soc/sunxi/sun4i-spdif.c +++ b/sound/soc/sunxi/sun4i-spdif.c @@ -21,6 +21,8 @@ #include <linux/platform_device.h> #include <linux/pm_runtime.h> #include <linux/reset.h> +#include <linux/spinlock.h> +#include <sound/asoundef.h> #include <sound/dmaengine_pcm.h> #include <sound/pcm_params.h> #include <sound/soc.h> @@ -186,6 +188,7 @@ struct sun4i_spdif_dev { struct regmap *regmap; struct snd_dmaengine_dai_dma_data dma_params_tx; const struct sun4i_spdif_quirks *quirks; + spinlock_t lock; }; static void sun4i_spdif_configure(struct sun4i_spdif_dev *host) @@ -385,11 +388,122 @@ static int sun4i_spdif_trigger(struct snd_pcm_substream *substream, int cmd, return ret; } +static int sun4i_spdif_info(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_info *uinfo) +{ + uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958; + uinfo->count = 1; + + return 0; +} + +static int sun4i_spdif_get_status_mask(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + u8 *status = ucontrol->value.iec958.status; + + status[0] = 0xff; + status[1] = 0xff; + status[2] = 0xff; + status[3] = 0xff; + status[4] = 0xff; + status[5] = 0x03; + + return 0; +} + +static int sun4i_spdif_get_status(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_soc_dai *cpu_dai = snd_kcontrol_chip(kcontrol); + struct sun4i_spdif_dev *host = snd_soc_dai_get_drvdata(cpu_dai); + u8 *status = ucontrol->value.iec958.status; + unsigned long flags; + unsigned int reg; + + spin_lock_irqsave(&host->lock, flags); + + regmap_read(host->regmap, SUN4I_SPDIF_TXCHSTA0, &reg); + + status[0] = reg & 0xff; + status[1] = (reg >> 8) & 0xff; + status[2] = (reg >> 16) & 0xff; + status[3] = (reg >> 24) & 0xff; + + regmap_read(host->regmap, SUN4I_SPDIF_TXCHSTA1, &reg); + + status[4] = reg & 0xff; + status[5] = (reg >> 8) & 0x3; + + spin_unlock_irqrestore(&host->lock, flags); + + return 0; +} + +static int sun4i_spdif_set_status(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_soc_dai *cpu_dai = snd_kcontrol_chip(kcontrol); + struct sun4i_spdif_dev *host = snd_soc_dai_get_drvdata(cpu_dai); + u8 *status = ucontrol->value.iec958.status; + unsigned long flags; + unsigned int reg; + bool chg0, chg1; + + spin_lock_irqsave(&host->lock, flags); + + reg = (u32)status[3] << 24; + reg |= (u32)status[2] << 16; + reg |= (u32)status[1] << 8; + reg |= (u32)status[0]; + + regmap_update_bits_check(host->regmap, SUN4I_SPDIF_TXCHSTA0, + GENMASK(31,0), reg, &chg0); + + reg = (u32)status[5] << 8; + reg |= (u32)status[4]; + + regmap_update_bits_check(host->regmap, SUN4I_SPDIF_TXCHSTA1, + GENMASK(9,0), reg, &chg1); + + reg = SUN4I_SPDIF_TXCFG_CHSTMODE; + if (status[0] & IEC958_AES0_NONAUDIO) + reg |= SUN4I_SPDIF_TXCFG_NONAUDIO; + + regmap_update_bits(host->regmap, SUN4I_SPDIF_TXCFG, + SUN4I_SPDIF_TXCFG_CHSTMODE | + SUN4I_SPDIF_TXCFG_NONAUDIO, reg); + + spin_unlock_irqrestore(&host->lock, flags); + + return chg0 || chg1; +} + +static struct snd_kcontrol_new sun4i_spdif_controls[] = { + { + .access = SNDRV_CTL_ELEM_ACCESS_READ, + .iface = SNDRV_CTL_ELEM_IFACE_PCM, + .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, MASK), + .info = sun4i_spdif_info, + .get = sun4i_spdif_get_status_mask + }, + { + .iface = SNDRV_CTL_ELEM_IFACE_PCM, + .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, DEFAULT), + .info = sun4i_spdif_info, + .get = sun4i_spdif_get_status, + .put = sun4i_spdif_set_status + } +}; + static int sun4i_spdif_soc_dai_probe(struct snd_soc_dai *dai) { struct sun4i_spdif_dev *host = snd_soc_dai_get_drvdata(dai); snd_soc_dai_init_dma_data(dai, &host->dma_params_tx, NULL); + snd_soc_add_dai_controls(dai, sun4i_spdif_controls, + ARRAY_SIZE(sun4i_spdif_controls)); + return 0; } @@ -512,6 +626,7 @@ static int sun4i_spdif_probe(struct platform_device *pdev) return -ENOMEM; host->pdev = pdev; + spin_lock_init(&host->lock); /* Initialize this copy of the CPU DAI driver structure */ memcpy(&host->cpu_dai_drv, &sun4i_spdif_dai, sizeof(sun4i_spdif_dai)); -- 2.34.0

2 1

[PATCH] ASoC: sun8i-codec: Add AIF, ADC, and DAC volume controls
by Samuel Holland 29 Nov '21

29 Nov '21

This allows changing the volume of each digital input/output independently, and provides the only "master volume" for the DAC. (The ADC also has a gain control on the analog side.) While the hardware supports digital gain up to +72dB, the controls here are limited to +24dB maximum, as any gain above that level makes volume sliders difficult to use, and is extremely likely to cause clipping. Signed-off-by: Samuel Holland <samuel(a)sholland.org> --- sound/soc/sunxi/sun8i-codec.c | 56 +++++++++++++++++++++++++++++++++++ 1 file changed, 56 insertions(+) diff --git a/sound/soc/sunxi/sun8i-codec.c b/sound/soc/sunxi/sun8i-codec.c index 518bfb724a5b..0bea2162f68d 100644 --- a/sound/soc/sunxi/sun8i-codec.c +++ b/sound/soc/sunxi/sun8i-codec.c @@ -21,6 +21,7 @@ #include <sound/pcm_params.h> #include <sound/soc.h> #include <sound/soc-dapm.h> +#include <sound/tlv.h> #define SUN8I_SYSCLK_CTL 0x00c #define SUN8I_SYSCLK_CTL_AIF1CLK_ENA 11 @@ -72,6 +73,12 @@ #define SUN8I_AIF1_MXR_SRC_AD0R_MXR_SRC_AIF2DACR 10 #define SUN8I_AIF1_MXR_SRC_AD0R_MXR_SRC_ADCR 9 #define SUN8I_AIF1_MXR_SRC_AD0R_MXR_SRC_AIF2DACL 8 +#define SUN8I_AIF1_VOL_CTRL1 0x050 +#define SUN8I_AIF1_VOL_CTRL1_AD0L_VOL 8 +#define SUN8I_AIF1_VOL_CTRL1_AD0R_VOL 0 +#define SUN8I_AIF1_VOL_CTRL3 0x058 +#define SUN8I_AIF1_VOL_CTRL3_DA0L_VOL 8 +#define SUN8I_AIF1_VOL_CTRL3_DA0R_VOL 0 #define SUN8I_AIF2_ADCDAT_CTRL 0x084 #define SUN8I_AIF2_ADCDAT_CTRL_AIF2_ADCL_ENA 15 #define SUN8I_AIF2_ADCDAT_CTRL_AIF2_ADCR_ENA 14 @@ -91,6 +98,12 @@ #define SUN8I_AIF2_MXR_SRC_ADCR_MXR_SRC_AIF1DA1R 10 #define SUN8I_AIF2_MXR_SRC_ADCR_MXR_SRC_AIF2DACL 9 #define SUN8I_AIF2_MXR_SRC_ADCR_MXR_SRC_ADCR 8 +#define SUN8I_AIF2_VOL_CTRL1 0x090 +#define SUN8I_AIF2_VOL_CTRL1_ADCL_VOL 8 +#define SUN8I_AIF2_VOL_CTRL1_ADCR_VOL 0 +#define SUN8I_AIF2_VOL_CTRL2 0x098 +#define SUN8I_AIF2_VOL_CTRL2_DACL_VOL 8 +#define SUN8I_AIF2_VOL_CTRL2_DACR_VOL 0 #define SUN8I_AIF3_CLK_CTRL_AIF3_CLK_SRC_AIF1 (0x0 << 0) #define SUN8I_AIF3_CLK_CTRL_AIF3_CLK_SRC_AIF2 (0x1 << 0) #define SUN8I_AIF3_CLK_CTRL_AIF3_CLK_SRC_AIF1CLK (0x2 << 0) @@ -102,8 +115,14 @@ #define SUN8I_ADC_DIG_CTRL_ENAD 15 #define SUN8I_ADC_DIG_CTRL_ADOUT_DTS 2 #define SUN8I_ADC_DIG_CTRL_ADOUT_DLY 1 +#define SUN8I_ADC_VOL_CTRL 0x104 +#define SUN8I_ADC_VOL_CTRL_ADCL_VOL 8 +#define SUN8I_ADC_VOL_CTRL_ADCR_VOL 0 #define SUN8I_DAC_DIG_CTRL 0x120 #define SUN8I_DAC_DIG_CTRL_ENDA 15 +#define SUN8I_DAC_VOL_CTRL 0x124 +#define SUN8I_DAC_VOL_CTRL_DACL_VOL 8 +#define SUN8I_DAC_VOL_CTRL_DACR_VOL 0 #define SUN8I_DAC_MXR_SRC 0x130 #define SUN8I_DAC_MXR_SRC_DACL_MXR_SRC_AIF1DA0L 15 #define SUN8I_DAC_MXR_SRC_DACL_MXR_SRC_AIF1DA1L 14 @@ -696,6 +715,41 @@ static struct snd_soc_dai_driver sun8i_codec_dais[] = { }, }; +static const DECLARE_TLV_DB_SCALE(sun8i_codec_vol_scale, -12000, 75, 1); + +static const struct snd_kcontrol_new sun8i_codec_controls[] = { + SOC_DOUBLE_TLV("AIF1 AD0 Capture Volume", + SUN8I_AIF1_VOL_CTRL1, + SUN8I_AIF1_VOL_CTRL1_AD0L_VOL, + SUN8I_AIF1_VOL_CTRL1_AD0R_VOL, + 0xc0, 0, sun8i_codec_vol_scale), + SOC_DOUBLE_TLV("AIF1 DA0 Playback Volume", + SUN8I_AIF1_VOL_CTRL3, + SUN8I_AIF1_VOL_CTRL3_DA0L_VOL, + SUN8I_AIF1_VOL_CTRL3_DA0R_VOL, + 0xc0, 0, sun8i_codec_vol_scale), + SOC_DOUBLE_TLV("AIF2 ADC Capture Volume", + SUN8I_AIF2_VOL_CTRL1, + SUN8I_AIF2_VOL_CTRL1_ADCL_VOL, + SUN8I_AIF2_VOL_CTRL1_ADCR_VOL, + 0xc0, 0, sun8i_codec_vol_scale), + SOC_DOUBLE_TLV("AIF2 DAC Playback Volume", + SUN8I_AIF2_VOL_CTRL2, + SUN8I_AIF2_VOL_CTRL2_DACL_VOL, + SUN8I_AIF2_VOL_CTRL2_DACR_VOL, + 0xc0, 0, sun8i_codec_vol_scale), + SOC_DOUBLE_TLV("ADC Capture Volume", + SUN8I_ADC_VOL_CTRL, + SUN8I_ADC_VOL_CTRL_ADCL_VOL, + SUN8I_ADC_VOL_CTRL_ADCR_VOL, + 0xc0, 0, sun8i_codec_vol_scale), + SOC_DOUBLE_TLV("DAC Playback Volume", + SUN8I_DAC_VOL_CTRL, + SUN8I_DAC_VOL_CTRL_DACL_VOL, + SUN8I_DAC_VOL_CTRL_DACR_VOL, + 0xc0, 0, sun8i_codec_vol_scale), +}; + static int sun8i_codec_aif_event(struct snd_soc_dapm_widget *w, struct snd_kcontrol *kcontrol, int event) { @@ -1215,6 +1269,8 @@ static int sun8i_codec_component_probe(struct snd_soc_component *component) } static const struct snd_soc_component_driver sun8i_soc_component = { + .controls = sun8i_codec_controls, + .num_controls = ARRAY_SIZE(sun8i_codec_controls), .dapm_widgets = sun8i_codec_dapm_widgets, .num_dapm_widgets = ARRAY_SIZE(sun8i_codec_dapm_widgets), .dapm_routes = sun8i_codec_dapm_routes, -- 2.32.0

2 1

[PATCH] ASoC: qcom: Add support for ALC5682I-VS codec
by lvzhaoxiong 29 Nov '21

29 Nov '21

Qcom machine driver adds rt5682s support in this patch. Card name can be specified from dts by model property, and driver makes use of the name to distinguish which headset codec is on the board. Signed-off-by: lvzhaoxiong <lvzhaoxiong(a)huaqin.corp-partner.google.com> --- sound/soc/qcom/Kconfig | 1 + sound/soc/qcom/sc7180.c | 24 +++++++++++++++++++----- 2 files changed, 20 insertions(+), 5 deletions(-) diff --git a/sound/soc/qcom/Kconfig b/sound/soc/qcom/Kconfig index b2173847dc47..cf3e151bb635 100644 --- a/sound/soc/qcom/Kconfig +++ b/sound/soc/qcom/Kconfig @@ -169,6 +169,7 @@ config SND_SOC_SC7180 select SND_SOC_LPASS_SC7180 select SND_SOC_MAX98357A select SND_SOC_RT5682_I2C + select SND_SOC_RT5682S select SND_SOC_ADAU7002 help To add support for audio on Qualcomm Technologies Inc. diff --git a/sound/soc/qcom/sc7180.c b/sound/soc/qcom/sc7180.c index 768566bb57a5..2fff764a00a7 100644 --- a/sound/soc/qcom/sc7180.c +++ b/sound/soc/qcom/sc7180.c @@ -17,6 +17,7 @@ #include <uapi/linux/input-event-codes.h> #include "../codecs/rt5682.h" +#include "../codecs/rt5682s.h" #include "common.h" #include "lpass.h" @@ -128,7 +129,21 @@ static int sc7180_snd_startup(struct snd_pcm_substream *substream) struct sc7180_snd_data *data = snd_soc_card_get_drvdata(card); struct snd_soc_dai *cpu_dai = asoc_rtd_to_cpu(rtd, 0); struct snd_soc_dai *codec_dai = asoc_rtd_to_codec(rtd, 0); - int ret; + int pll_id, pll_source, pll_in, pll_out, clk_id, ret; + + if (!(strcmp(card->name, "sc7180-rt5682-max98357a-1mic"))) { + pll_source = RT5682_PLL1_S_MCLK; + pll_id = 0; + clk_id = RT5682_SCLK_S_PLL1; + pll_out = RT5682_PLL1_FREQ; + pll_in = DEFAULT_MCLK_RATE; + } else if (!(strcmp(card->name, "sc7180-rt5682s-max98357a-1mic"))) { + pll_source = RT5682S_PLL_S_MCLK; + pll_id = RT5682S_PLL2; + clk_id = RT5682S_SCLK_S_PLL2; + pll_out = RT5682_PLL1_FREQ; + pll_in = DEFAULT_MCLK_RATE; + } switch (cpu_dai->id) { case MI2S_PRIMARY: @@ -145,16 +160,15 @@ static int sc7180_snd_startup(struct snd_pcm_substream *substream) SND_SOC_DAIFMT_I2S); /* Configure PLL1 for codec */ - ret = snd_soc_dai_set_pll(codec_dai, 0, RT5682_PLL1_S_MCLK, - DEFAULT_MCLK_RATE, RT5682_PLL1_FREQ); + ret = snd_soc_dai_set_pll(codec_dai, pll_id, pll_source, + pll_in, pll_out); if (ret) { dev_err(rtd->dev, "can't set codec pll: %d\n", ret); return ret; } /* Configure sysclk for codec */ - ret = snd_soc_dai_set_sysclk(codec_dai, RT5682_SCLK_S_PLL1, - RT5682_PLL1_FREQ, + ret = snd_soc_dai_set_sysclk(codec_dai, clk_id, pll_out, SND_SOC_CLOCK_IN); if (ret) dev_err(rtd->dev, "snd_soc_dai_set_sysclk err = %d\n", -- 2.17.1

2 1

ALSA: hda: Make proper use of timecounter
by Thomas Gleixner 29 Nov '21

29 Nov '21

HDA uses a timecounter to read a hardware clock running at 24 MHz. The conversion factor is set with a mult value of 125 and a shift value of 0, which is not converting the hardware clock to nanoseconds, it is converting to 1/3 nanoseconds because the conversion factor from 24Mhz to nanoseconds is 125/3. The usage sites divide the "nanoseconds" value returned by timecounter_read() by 3 to get a real nanoseconds value. There is a lengthy comment in azx_timecounter_init() explaining this choice. That comment makes blatantly wrong assumptions about how timecounters work and what can overflow. The comment says: * Applying the 1/3 factor as part of the multiplication * requires at least 20 bits for a decent precision, however * overflows occur after about 4 hours or less, not a option. timecounters operate on time deltas between two readouts of a clock and use the mult/shift pair to calculate a precise nanoseconds value: delta_nsec = (delta_clock * mult) >> shift; The fractional part is also taken into account and preserved to prevent accumulated rounding errors. For details see cyclecounter_cyc2ns(). The mult/shift pair has to be chosen so that the multiplication of the maximum expected delta value does not result in a 64bit overflow. As the counter wraps around on 32bit, the maximum observable delta between two reads is (1 << 32) - 1 which is about 178.9 seconds. That in turn means the maximum multiplication factor which fits into an u32 will not cause a 64bit overflow ever because it's guaranteed that: ((1 << 32) - 1) ^ 2 < (1 << 64) The resulting correct multiplication factor is 2796202667 and the shift value is 26, i.e. 26 bit precision. The overflow of the multiplication would happen exactly at a clock readout delta of 6597069765 which is way after the wrap around of the hardware clock at around 274.8 seconds which is off from the claimed 4 hours by more than an order of magnitude. If the counter ever wraps around the last read value then the calculation is off by the number of wrap arounds times 178.9 seconds because the overflow cannot be observed. Use clocks_calc_mult_shift(), which calculates the most accurate mult/shift pair based on the given clock frequency, and remove the bogus comment along with the divisions at the readout sites. Fixes: 5d890f591d15 ("ALSA: hda: support for wallclock timestamps") Signed-off-by: Thomas Gleixner <tglx(a)linutronix.de> --- sound/hda/hdac_stream.c | 14 ++++---------- sound/pci/hda/hda_controller.c | 1 - sound/soc/intel/skylake/skl-pcm.c | 1 - 3 files changed, 4 insertions(+), 12 deletions(-) --- a/sound/hda/hdac_stream.c +++ b/sound/hda/hdac_stream.c @@ -534,17 +534,11 @@ static void azx_timecounter_init(struct cc->mask = CLOCKSOURCE_MASK(32); /* - * Converting from 24 MHz to ns means applying a 125/3 factor. - * To avoid any saturation issues in intermediate operations, - * the 125 factor is applied first. The division is applied - * last after reading the timecounter value. - * Applying the 1/3 factor as part of the multiplication - * requires at least 20 bits for a decent precision, however - * overflows occur after about 4 hours or less, not a option. + * Calculate the optimal mult/shift values. The counter wraps + * around after ~178.9 seconds. */ - - cc->mult = 125; /* saturation after 195 years */ - cc->shift = 0; + clocks_calc_mult_shift(&cc->mult, &cc->shift, 24000000, + NSEC_PER_SEC, 178); nsec = 0; /* audio time is elapsed time since trigger */ timecounter_init(tc, cc, nsec); --- a/sound/pci/hda/hda_controller.c +++ b/sound/pci/hda/hda_controller.c @@ -504,7 +504,6 @@ static int azx_get_time_info(struct snd_ snd_pcm_gettime(substream->runtime, system_ts); nsec = timecounter_read(&azx_dev->core.tc); - nsec = div_u64(nsec, 3); /* can be optimized */ if (audio_tstamp_config->report_delay) nsec = azx_adjust_codec_delay(substream, nsec); --- a/sound/soc/intel/skylake/skl-pcm.c +++ b/sound/soc/intel/skylake/skl-pcm.c @@ -1251,7 +1251,6 @@ static int skl_platform_soc_get_time_inf snd_pcm_gettime(substream->runtime, system_ts); nsec = timecounter_read(&hstr->tc); - nsec = div_u64(nsec, 3); /* can be optimized */ if (audio_tstamp_config->report_delay) nsec = skl_adjust_codec_delay(substream, nsec);

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[PATCH] ALSA: hda/cs8409: Set PMSG_ON earlier inside cs8409 driver
by Vitaly Rodionov 29 Nov '21

29 Nov '21

From: Stefan Binding <sbinding(a)opensource.cirrus.com> For cs8409, it is required to run Jack Detect on resume. Jack Detect on cs8409+cs42l42 requires an interrupt from cs42l42 to be sent to cs8409 which is propogated to the driver via an unsolicited event. However, the hda_codec drops unsolicited events if the power_state is not set to PMSG_ON. Which is set at the end of the resume call. This means there is a race condition between setting power_state to PMSG_ON and receiving the interrupt. To solve this, we can add an API to set the power_state earlier and call that before we start Jack Detect. This does not cause issues, since we know inside our driver that we are already initialized, and ready to handle the unsolicited events. Signed-off-by: Stefan Binding <sbinding(a)opensource.cirrus.com> Signed-off-by: Vitaly Rodionov <vitalyr(a)opensource.cirrus.com> --- sound/pci/hda/hda_local.h | 8 ++++++++ sound/pci/hda/patch_cs8409.c | 5 +++++ 2 files changed, 13 insertions(+) diff --git a/sound/pci/hda/hda_local.h b/sound/pci/hda/hda_local.h index 4662a47add7e..96f78daf90f0 100644 --- a/sound/pci/hda/hda_local.h +++ b/sound/pci/hda/hda_local.h @@ -439,6 +439,14 @@ int snd_hda_codec_set_pin_target(struct hda_codec *codec, hda_nid_t nid, #define for_each_hda_codec_node(nid, codec) \ for ((nid) = (codec)->core.start_nid; (nid) < (codec)->core.end_nid; (nid)++) +/* Set the codec power_state flag to indicate to allow unsol event handling; + * see hda_codec_unsol_event() in hda_bind.c. Calling this might confuse the + * state tracking, so use with care. + */ +static inline void snd_hda_codec_allow_unsol_events(struct hda_codec *codec) { + codec->core.dev.power.power_state = PMSG_ON; +} + /* * get widget capabilities */ diff --git a/sound/pci/hda/patch_cs8409.c b/sound/pci/hda/patch_cs8409.c index 31ff11ab868e..039b9f2f8e94 100644 --- a/sound/pci/hda/patch_cs8409.c +++ b/sound/pci/hda/patch_cs8409.c @@ -750,6 +750,11 @@ static void cs42l42_resume(struct sub_codec *cs42l42) if (cs42l42->full_scale_vol) cs8409_i2c_write(cs42l42, 0x2001, 0x01); + /* we have to explicitly allow unsol event handling even during the + * resume phase so that the jack event is processed properly + */ + snd_hda_codec_allow_unsol_events(cs42l42->codec); + cs42l42_enable_jack_detect(cs42l42); } -- 2.25.1

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[PATCH v7 0/3] This patches provide ADSP IPC support for MT8195
by allen-kh.cheng 29 Nov '21

29 Nov '21

From: Allen-KH Cheng <Allen-KH.Cheng(a)mediatek.com> Mediatek ADSP IPC is used to send notification or short message between processors with dsp.· It will place the message to the share buffer and will access the ADSP mailbox registers to kick dsp. Two mailboxes used to send notification or short message between processors with dsp changes since v6: - dt-bindings: change example dtsi node. - change config MTK_ADSP_IPC_MBOX to MTK_ADSP_MBOX - remove unused variable - add reviewers changes since v5: - remove some redundant code changes since v4: - use switch ... case in adsp_ipc_recv - add error handling path for chan_name pointer - refine some code to be concise changes since v3: - reorder MTK_ADSP_IPC_MBOX config - remove some redundant code - remove lock in mtk-adsp-mailbox changes since v2: - separate adsp_mailbox into two instances changes since v1: - fix dt_binding_check error Allen-KH Cheng (3): dt-bindings: mediatek: add adsp-mbox document firmware: mediatek: add adsp ipc protocol interface mailbox: mediatek: add support for adsp mailbox controller .../bindings/mailbox/mtk,adsp-mbox.yaml | 52 ++++++ drivers/firmware/Kconfig | 1 + drivers/firmware/Makefile | 1 + drivers/firmware/mediatek/Kconfig | 9 + drivers/firmware/mediatek/Makefile | 2 + drivers/firmware/mediatek/mtk-adsp-ipc.c | 138 ++++++++++++++ drivers/mailbox/Kconfig | 7 + drivers/mailbox/Makefile | 2 + drivers/mailbox/mtk-adsp-mailbox.c | 175 ++++++++++++++++++ .../linux/firmware/mediatek/mtk-adsp-ipc.h | 70 +++++++ 10 files changed, 457 insertions(+) create mode 100644 Documentation/devicetree/bindings/mailbox/mtk,adsp-mbox.yaml create mode 100644 drivers/firmware/mediatek/Kconfig create mode 100644 drivers/firmware/mediatek/Makefile create mode 100644 drivers/firmware/mediatek/mtk-adsp-ipc.c create mode 100644 drivers/mailbox/mtk-adsp-mailbox.c create mode 100644 include/linux/firmware/mediatek/mtk-adsp-ipc.h -- 2.18.0

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Shouldn't there be an error..
by GitHub issues - edited 28 Nov '21

28 Nov '21

alsa-project/alsa-utils issue #121 was edited from auwsom: ..when I type `aplay test.wav` and there is "no soundcards found" when I type `aplay -l`? Instead of nothing. How would I know to check if there is a soundcard, versus some other component of was causing no sound to be heard. Thanks Issue URL : https://github.com/alsa-project/alsa-utils/issues/121 Repository URL: https://github.com/alsa-project/alsa-utils

1 0

Shouldn't there be an error..
by GitHub issues - opened 28 Nov '21

28 Nov '21

alsa-project/alsa-utils issue #121 was opened from auwsom: ..when I type `aplay test.wav` and there is "no soundcards found" when I type `aplay -l`? Issue URL : https://github.com/alsa-project/alsa-utils/issues/121 Repository URL: https://github.com/alsa-project/alsa-utils

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