March 2019 - Alsa-devel - mailman.alsa-project.org

[alsa-devel] [asoc:for-5.2 73/82] sound/soc//codecs/tlv320aic32x4-clk.c:257:21: error: variable 'aic32x4_pll_ops' has initializer but incomplete type
by kbuild test robot 25 Mar '19

25 Mar '19

tree: https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git for-5.2 head: 6d56ee1550b8a81bc63c80051ff78d8d704b09ba commit: 514b044cba667e4b7c383ec79b42b997e624b91d [73/82] ASoC: tlv320aic32x4: Model PLL in CCF config: sparc64-allyesconfig (attached as .config) compiler: sparc64-linux-gnu-gcc (Debian 7.2.0-11) 7.2.0 reproduce: wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross git checkout 514b044cba667e4b7c383ec79b42b997e624b91d # save the attached .config to linux build tree GCC_VERSION=7.2.0 make.cross ARCH=sparc64 All error/warnings (new ones prefixed by >>): >> sound/soc//codecs/tlv320aic32x4-clk.c:19:16: error: field 'hw' has incomplete type struct clk_hw hw; ^~ In file included from include/linux/init.h:5:0, from include/linux/io.h:22, from include/linux/clk-provider.h:9, from sound/soc//codecs/tlv320aic32x4-clk.c:10: sound/soc//codecs/tlv320aic32x4-clk.c: In function 'clk_aic32x4_pll_prepare': include/linux/kernel.h:979:32: error: dereferencing pointer to incomplete type 'struct clk_hw' BUILD_BUG_ON_MSG(!__same_type(*(ptr), ((type *)0)->member) && \ ^~~~~~ include/linux/compiler.h:324:9: note: in definition of macro '__compiletime_assert' if (!(condition)) \ ^~~~~~~~~ include/linux/compiler.h:344:2: note: in expansion of macro '_compiletime_assert' _compiletime_assert(condition, msg, __compiletime_assert_, __LINE__) ^~~~~~~~~~~~~~~~~~~ include/linux/build_bug.h:39:37: note: in expansion of macro 'compiletime_assert' #define BUILD_BUG_ON_MSG(cond, msg) compiletime_assert(!(cond), msg) ^~~~~~~~~~~~~~~~~~ include/linux/kernel.h:979:2: note: in expansion of macro 'BUILD_BUG_ON_MSG' BUILD_BUG_ON_MSG(!__same_type(*(ptr), ((type *)0)->member) && \ ^~~~~~~~~~~~~~~~ include/linux/kernel.h:979:20: note: in expansion of macro '__same_type' BUILD_BUG_ON_MSG(!__same_type(*(ptr), ((type *)0)->member) && \ ^~~~~~~~~~~ >> sound/soc//codecs/tlv320aic32x4-clk.c:17:29: note: in expansion of macro 'container_of' #define to_clk_aic32x4(_hw) container_of(_hw, struct clk_aic32x4, hw) ^~~~~~~~~~~~ >> sound/soc//codecs/tlv320aic32x4-clk.c:49:28: note: in expansion of macro 'to_clk_aic32x4' struct clk_aic32x4 *pll = to_clk_aic32x4(hw); ^~~~~~~~~~~~~~ sound/soc//codecs/tlv320aic32x4-clk.c: At top level: >> sound/soc//codecs/tlv320aic32x4-clk.c:257:21: error: variable 'aic32x4_pll_ops' has initializer but incomplete type static const struct clk_ops aic32x4_pll_ops = { ^~~~~~~ >> sound/soc//codecs/tlv320aic32x4-clk.c:258:3: error: 'const struct clk_ops' has no member named 'prepare' .prepare = clk_aic32x4_pll_prepare, ^~~~~~~ >> sound/soc//codecs/tlv320aic32x4-clk.c:258:13: warning: excess elements in struct initializer .prepare = clk_aic32x4_pll_prepare, ^~~~~~~~~~~~~~~~~~~~~~~ sound/soc//codecs/tlv320aic32x4-clk.c:258:13: note: (near initialization for 'aic32x4_pll_ops') >> sound/soc//codecs/tlv320aic32x4-clk.c:259:3: error: 'const struct clk_ops' has no member named 'unprepare' .unprepare = clk_aic32x4_pll_unprepare, ^~~~~~~~~ sound/soc//codecs/tlv320aic32x4-clk.c:259:15: warning: excess elements in struct initializer .unprepare = clk_aic32x4_pll_unprepare, ^~~~~~~~~~~~~~~~~~~~~~~~~ sound/soc//codecs/tlv320aic32x4-clk.c:259:15: note: (near initialization for 'aic32x4_pll_ops') >> sound/soc//codecs/tlv320aic32x4-clk.c:260:3: error: 'const struct clk_ops' has no member named 'is_prepared' .is_prepared = clk_aic32x4_pll_is_prepared, ^~~~~~~~~~~ sound/soc//codecs/tlv320aic32x4-clk.c:260:17: warning: excess elements in struct initializer .is_prepared = clk_aic32x4_pll_is_prepared, ^~~~~~~~~~~~~~~~~~~~~~~~~~~ sound/soc//codecs/tlv320aic32x4-clk.c:260:17: note: (near initialization for 'aic32x4_pll_ops') >> sound/soc//codecs/tlv320aic32x4-clk.c:261:3: error: 'const struct clk_ops' has no member named 'recalc_rate' .recalc_rate = clk_aic32x4_pll_recalc_rate, ^~~~~~~~~~~ sound/soc//codecs/tlv320aic32x4-clk.c:261:17: warning: excess elements in struct initializer .recalc_rate = clk_aic32x4_pll_recalc_rate, ^~~~~~~~~~~~~~~~~~~~~~~~~~~ sound/soc//codecs/tlv320aic32x4-clk.c:261:17: note: (near initialization for 'aic32x4_pll_ops') >> sound/soc//codecs/tlv320aic32x4-clk.c:262:3: error: 'const struct clk_ops' has no member named 'round_rate' .round_rate = clk_aic32x4_pll_round_rate, ^~~~~~~~~~ sound/soc//codecs/tlv320aic32x4-clk.c:262:16: warning: excess elements in struct initializer .round_rate = clk_aic32x4_pll_round_rate, ^~~~~~~~~~~~~~~~~~~~~~~~~~ sound/soc//codecs/tlv320aic32x4-clk.c:262:16: note: (near initialization for 'aic32x4_pll_ops') >> sound/soc//codecs/tlv320aic32x4-clk.c:263:3: error: 'const struct clk_ops' has no member named 'set_rate' .set_rate = clk_aic32x4_pll_set_rate, ^~~~~~~~ sound/soc//codecs/tlv320aic32x4-clk.c:263:14: warning: excess elements in struct initializer .set_rate = clk_aic32x4_pll_set_rate, ^~~~~~~~~~~~~~~~~~~~~~~~ sound/soc//codecs/tlv320aic32x4-clk.c:263:14: note: (near initialization for 'aic32x4_pll_ops') >> sound/soc//codecs/tlv320aic32x4-clk.c:264:3: error: 'const struct clk_ops' has no member named 'set_parent' .set_parent = clk_aic32x4_pll_set_parent, ^~~~~~~~~~ sound/soc//codecs/tlv320aic32x4-clk.c:264:16: warning: excess elements in struct initializer .set_parent = clk_aic32x4_pll_set_parent, ^~~~~~~~~~~~~~~~~~~~~~~~~~ sound/soc//codecs/tlv320aic32x4-clk.c:264:16: note: (near initialization for 'aic32x4_pll_ops') >> sound/soc//codecs/tlv320aic32x4-clk.c:265:3: error: 'const struct clk_ops' has no member named 'get_parent' .get_parent = clk_aic32x4_pll_get_parent, ^~~~~~~~~~ sound/soc//codecs/tlv320aic32x4-clk.c:265:16: warning: excess elements in struct initializer .get_parent = clk_aic32x4_pll_get_parent, ^~~~~~~~~~~~~~~~~~~~~~~~~~ sound/soc//codecs/tlv320aic32x4-clk.c:265:16: note: (near initialization for 'aic32x4_pll_ops') sound/soc//codecs/tlv320aic32x4-clk.c: In function 'aic32x4_register_clk': >> sound/soc//codecs/tlv320aic32x4-clk.c:282:23: error: storage size of 'init' isn't known struct clk_init_data init; ^~~~ >> sound/soc//codecs/tlv320aic32x4-clk.c:302:9: error: implicit declaration of function 'devm_clk_register'; did you mean 'device_register'? [-Werror=implicit-function-declaration] return devm_clk_register(dev, &priv->hw); ^~~~~~~~~~~~~~~~~ device_register sound/soc//codecs/tlv320aic32x4-clk.c:282:23: warning: unused variable 'init' [-Wunused-variable] struct clk_init_data init; ^~~~ sound/soc//codecs/tlv320aic32x4-clk.c: At top level: >> sound/soc//codecs/tlv320aic32x4-clk.c:257:29: error: storage size of 'aic32x4_pll_ops' isn't known static const struct clk_ops aic32x4_pll_ops = { ^~~~~~~~~~~~~~~ sound/soc//codecs/tlv320aic32x4-clk.c: In function 'aic32x4_register_clk': >> sound/soc//codecs/tlv320aic32x4-clk.c:303:1: warning: control reaches end of non-void function [-Wreturn-type] } ^ cc1: some warnings being treated as errors vim +/aic32x4_pll_ops +257 sound/soc//codecs/tlv320aic32x4-clk.c 255 256 > 257 static const struct clk_ops aic32x4_pll_ops = { > 258 .prepare = clk_aic32x4_pll_prepare, > 259 .unprepare = clk_aic32x4_pll_unprepare, > 260 .is_prepared = clk_aic32x4_pll_is_prepared, > 261 .recalc_rate = clk_aic32x4_pll_recalc_rate, > 262 .round_rate = clk_aic32x4_pll_round_rate, > 263 .set_rate = clk_aic32x4_pll_set_rate, > 264 .set_parent = clk_aic32x4_pll_set_parent, > 265 .get_parent = clk_aic32x4_pll_get_parent, 266 }; 267 268 static struct aic32x4_clkdesc aic32x4_clkdesc_array[] = { 269 { 270 .name = "pll", 271 .parent_names = 272 (const char* []) { "mclk", "bclk", "gpio", "din" }, 273 .num_parents = 4, 274 .ops = &aic32x4_pll_ops, 275 .reg = 0, 276 }, 277 }; 278 279 static struct clk *aic32x4_register_clk(struct device *dev, 280 struct aic32x4_clkdesc *desc) 281 { > 282 struct clk_init_data init; 283 struct clk_aic32x4 *priv; 284 const char *devname = dev_name(dev); 285 286 init.ops = desc->ops; 287 init.name = desc->name; 288 init.parent_names = desc->parent_names; 289 init.num_parents = desc->num_parents; 290 init.flags = 0; 291 292 priv = devm_kzalloc(dev, sizeof(struct clk_aic32x4), GFP_KERNEL); 293 if (priv == NULL) 294 return (struct clk *) -ENOMEM; 295 296 priv->dev = dev; 297 priv->hw.init = &init; 298 priv->regmap = dev_get_regmap(dev, NULL); 299 priv->reg = desc->reg; 300 301 clk_hw_register_clkdev(&priv->hw, desc->name, devname); > 302 return devm_clk_register(dev, &priv->hw); > 303 } 304 --- 0-DAY kernel test infrastructure Open Source Technology Center https://lists.01.org/pipermail/kbuild-all Intel Corporation

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[alsa-devel] [PATCH] ASoC: intel: Fix crash at suspend/resume after failed codec registration
by Guenter Roeck 25 Mar '19

25 Mar '19

If codec registration fails after the ASoC Intel SST driver has been probed, the kernel will Oops and crash at suspend/resume. general protection fault: 0000 [#1] PREEMPT SMP KASAN PTI CPU: 1 PID: 2811 Comm: cat Tainted: G W 4.19.30 #15 Hardware name: GOOGLE Clapper, BIOS Google_Clapper.5216.199.7 08/22/2014 RIP: 0010:snd_soc_suspend+0x5a/0xd21 Code: 03 80 3c 10 00 49 89 d7 74 0b 48 89 df e8 71 72 c4 fe 4c 89 fa 48 8b 03 48 89 45 d0 48 8d 98 a0 01 00 00 48 89 d8 48 c1 e8 03 <8a> 04 10 84 c0 0f 85 85 0c 00 00 80 3b 00 0f 84 6b 0c 00 00 48 8b RSP: 0018:ffff888035407750 EFLAGS: 00010202 RAX: 0000000000000034 RBX: 00000000000001a0 RCX: 0000000000000000 RDX: dffffc0000000000 RSI: 0000000000000008 RDI: ffff88805c417098 RBP: ffff8880354077b0 R08: dffffc0000000000 R09: ffffed100b975718 R10: 0000000000000001 R11: ffffffff949ea4a3 R12: 1ffff1100b975746 R13: dffffc0000000000 R14: ffff88805cba4588 R15: dffffc0000000000 FS: 0000794a78e91b80(0000) GS:ffff888068d00000(0000) knlGS:0000000000000000 CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033 CR2: 00007bd5283ccf58 CR3: 000000004b7aa000 CR4: 00000000001006e0 Call Trace: ? dpm_complete+0x67b/0x67b ? i915_gem_suspend+0x14d/0x1ad sst_soc_prepare+0x91/0x1dd ? sst_be_hw_params+0x7e/0x7e dpm_prepare+0x39a/0x88b dpm_suspend_start+0x13/0x9d suspend_devices_and_enter+0x18f/0xbd7 ? arch_suspend_enable_irqs+0x11/0x11 ? printk+0xd9/0x12d ? lock_release+0x95f/0x95f ? log_buf_vmcoreinfo_setup+0x131/0x131 ? rcu_read_lock_sched_held+0x140/0x22a ? __bpf_trace_rcu_utilization+0xa/0xa ? __pm_pr_dbg+0x186/0x190 ? pm_notifier_call_chain+0x39/0x39 ? suspend_test+0x9d/0x9d pm_suspend+0x2f4/0x728 ? trace_suspend_resume+0x3da/0x3da ? lock_release+0x95f/0x95f ? kernfs_fop_write+0x19f/0x32d state_store+0xd8/0x147 ? sysfs_kf_read+0x155/0x155 kernfs_fop_write+0x23e/0x32d __vfs_write+0x108/0x608 ? vfs_read+0x2e9/0x2e9 ? rcu_read_lock_sched_held+0x140/0x22a ? __bpf_trace_rcu_utilization+0xa/0xa ? debug_smp_processor_id+0x10/0x10 ? selinux_file_permission+0x1c5/0x3c8 ? rcu_sync_lockdep_assert+0x6a/0xad ? __sb_start_write+0x129/0x2ac vfs_write+0x1aa/0x434 ksys_write+0xfe/0x1be ? __ia32_sys_read+0x82/0x82 do_syscall_64+0xcd/0x120 entry_SYSCALL_64_after_hwframe+0x49/0xbe In the observed situation, the problem is seen because the codec driver failed to probe due to a hardware problem. max98090 i2c-193C9890:00: Failed to read device revision: -1 max98090 i2c-193C9890:00: ASoC: failed to probe component -1 cht-bsw-max98090 cht-bsw-max98090: ASoC: failed to instantiate card -1 cht-bsw-max98090 cht-bsw-max98090: snd_soc_register_card failed -1 cht-bsw-max98090: probe of cht-bsw-max98090 failed with error -1 The problem is similar to the problem solved with commit 2fc995a87f2e ("ASoC: intel: Fix crash at suspend/resume without card registration"), but codec registration fails at a later point. At that time, the pointer checked with the above mentioned commit is already set, but it is not cleared if the device is subsequently removed. Adding a remove function to clear the pointer fixes the problem. Cc: stable(a)vger.kernel.org Cc: Jarkko Nikula <jarkko.nikula(a)linux.intel.com> Cc: Curtis Malainey <cujomalainey(a)chromium.org> Signed-off-by: Guenter Roeck <linux(a)roeck-us.net> --- sound/soc/intel/atom/sst-mfld-platform-pcm.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/sound/soc/intel/atom/sst-mfld-platform-pcm.c b/sound/soc/intel/atom/sst-mfld-platform-pcm.c index 08cea5b5cda9..0e8b1c5eec88 100644 --- a/sound/soc/intel/atom/sst-mfld-platform-pcm.c +++ b/sound/soc/intel/atom/sst-mfld-platform-pcm.c @@ -706,9 +706,17 @@ static int sst_soc_probe(struct snd_soc_component *component) return sst_dsp_init_v2_dpcm(component); } +static void sst_soc_remove(struct snd_soc_component *component) +{ + struct sst_data *drv = dev_get_drvdata(component->dev); + + drv->soc_card = NULL; +} + static const struct snd_soc_component_driver sst_soc_platform_drv = { .name = DRV_NAME, .probe = sst_soc_probe, + .remove = sst_soc_remove, .ops = &sst_platform_ops, .compr_ops = &sst_platform_compr_ops, .pcm_new = sst_pcm_new, -- 2.7.4

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[alsa-devel] [PATCH] ASoC: dapm: Initialize private_value in snd_soc_dapm_new_dai
by Pankaj Bharadiya 25 Mar '19

25 Mar '19

In case of single config, private_value is left uninitialized. The private_value does need to be initialized or in snd_soc_dapm_new_control_unlocked() call failure case, it leads to a bogus free in snd_soc_dapm_free_kcontrol() Signed-off-by: Pankaj Bharadiya <pankaj.laxminarayan.bharadiya(a)intel.com> --- sound/soc/soc-dapm.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/sound/soc/soc-dapm.c b/sound/soc/soc-dapm.c index 67b032c..665a6b1 100644 --- a/sound/soc/soc-dapm.c +++ b/sound/soc/soc-dapm.c @@ -4042,7 +4042,7 @@ snd_soc_dapm_new_dai(struct snd_soc_card *card, struct snd_soc_pcm_runtime *rtd, struct snd_soc_dapm_widget template; struct snd_soc_dapm_widget *w; const char **w_param_text; - unsigned long private_value; + unsigned long private_value = 0; char *link_name; int ret; -- 2.7.4

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[alsa-devel] [PATCH v4 00/10] ASoC: tlv320aic32x4: Rework Clock Setting
by Annaliese McDermond 25 Mar '19

25 Mar '19

The current tlv320aic32x4 code sets the various clock parameters by looking in a static table in the kernel. This works well enough, but it has a few disadvantages. 1) If the master clock doesn't match one of the precalculated values the driver cannot work. This could be because the designer decided to use a different crystal, or because the clock comes from a PLL that can't quite achieve the proper frequency exactly. 2) The driver only supports certain pre-calculated sample rates. The actual hardware can support many more. These changes enable those rates. Additionally, certain sample rates at certain clock rates were previously unavailable as combinations. This patch dynamically calculates the various PLL and divider values to find something that works. Additionally, to enable much of this, the clock tree is modeled as a part of the Common Clock Framework. This allows for easier debugigng as you can use the standard tools such as /sys/kernel/debug/clk/clk_summary. It also simplifies enabling the entirety of the clock tree needed, and makes sure unused clocks become disabled. These patches have been tested and are working on a Raspberry Pi with the simplecard driver. Changes in v2: - Update 0002 patch to change Kconfig to add dependency on CCF - Update 0002 patch to correct the SPDX identifier - Update 0002 patch to use EXPORT_SYMBOL_GPL() instead of EXPORT_SYMBOL() - Update patches 0002, 0004 and 0005 to use prepare/unprepare instead of enable/disable since the i2c operations are not atomic - Update 0004 patch to fix indentation in commit message - Drop patch 0009 because it is a duplicate of the already committed patch in 667e9334 - Update 0019 patch to keep aic32x4_set_dai_sysclk but to have it use clk_set_rate to set the master clock rate Changes in v3: - Rebase on current for-next - Move "Properly Set Processing Blocks" to the start of the patches so that it can potentially be applied as a bug fix Changes in v4: - Rabase on current for-next - Regenerate patches to get them to apply correctly. Verified with git-am on for-next and they appear to work here. Annaliese McDermond (10): ASoC: tlv320aic32x4: Model PLL in CCF ASoC: tlv320aic32x4: Model CODEC_CLKIN in CCF ASoC: tlv320aic32x4: Model DAC/ADC dividers in CCF ASoC: tlv320aic32x4: Model BDIV divider in CCF ASoC: tlv320aic32x4: Control clock gating with CCF ASoC: tlv320aic32x4: Move aosr and dosr setting to separate functions ASoC: tlv320aic32x4: Dynamically Determine Clocking ASoC: tlv320aic32x4: Restructure set_dai_sysclk ASoC: tlv320aic32x4: Remove mclk references ASoC: tlv320aic32x4: Allow 192000 Sample Rate sound/soc/codecs/Kconfig | 1 + sound/soc/codecs/Makefile | 2 +- sound/soc/codecs/tlv320aic32x4-clk.c | 483 +++++++++++++++++++++++++++ sound/soc/codecs/tlv320aic32x4.c | 427 +++++++++++------------ sound/soc/codecs/tlv320aic32x4.h | 11 + 5 files changed, 692 insertions(+), 232 deletions(-) create mode 100644 sound/soc/codecs/tlv320aic32x4-clk.c -- 2.19.1

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[alsa-devel] Applied "ASoC: tlv320aic32x4: Model CODEC_CLKIN in CCF" to the asoc tree
by Mark Brown 25 Mar '19

25 Mar '19

The patch ASoC: tlv320aic32x4: Model CODEC_CLKIN in CCF has been applied to the asoc tree at https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git All being well this means that it will be integrated into the linux-next tree (usually sometime in the next 24 hours) and sent to Linus during the next merge window (or sooner if it is a bug fix), however if problems are discovered then the patch may be dropped or reverted. You may get further e-mails resulting from automated or manual testing and review of the tree, please engage with people reporting problems and send followup patches addressing any issues that are reported if needed. If any updates are required or you are submitting further changes they should be sent as incremental updates against current git, existing patches will not be replaced. Please add any relevant lists and maintainers to the CCs when replying to this mail. Thanks, Mark >From fd2df3aeafa4b4cc468d58e147e0822967034b71 Mon Sep 17 00:00:00 2001 From: Annaliese McDermond <nh6z(a)nh6z.net> Date: Thu, 21 Mar 2019 17:58:46 -0700 Subject: [PATCH] ASoC: tlv320aic32x4: Model CODEC_CLKIN in CCF Model and manage codec clock input as a component in the Core Clock Framework. This should allow us to do some more complex clock management and power control. Also, some of the on-board chip clocks can be exposed to the outside, and this change will make those clocks easier to consume by other parts of the kernel. Signed-off-by: Annaliese McDermond <nh6z(a)nh6z.net> Signed-off-by: Mark Brown <broonie(a)kernel.org> --- sound/soc/codecs/tlv320aic32x4-clk.c | 34 ++++++++++++++++++++++++++++ sound/soc/codecs/tlv320aic32x4.c | 18 +++++++++++---- 2 files changed, 47 insertions(+), 5 deletions(-) diff --git a/sound/soc/codecs/tlv320aic32x4-clk.c b/sound/soc/codecs/tlv320aic32x4-clk.c index 5e495fc8d931..cded85009c8c 100644 --- a/sound/soc/codecs/tlv320aic32x4-clk.c +++ b/sound/soc/codecs/tlv320aic32x4-clk.c @@ -265,6 +265,30 @@ static const struct clk_ops aic32x4_pll_ops = { .get_parent = clk_aic32x4_pll_get_parent, }; +static int clk_aic32x4_codec_clkin_set_parent(struct clk_hw *hw, u8 index) +{ + struct clk_aic32x4 *mux = to_clk_aic32x4(hw); + + return regmap_update_bits(mux->regmap, + AIC32X4_CLKMUX, + AIC32X4_CODEC_CLKIN_MASK, index << AIC32X4_CODEC_CLKIN_SHIFT); +} + +static u8 clk_aic32x4_codec_clkin_get_parent(struct clk_hw *hw) +{ + struct clk_aic32x4 *mux = to_clk_aic32x4(hw); + unsigned int val; + + regmap_read(mux->regmap, AIC32X4_CLKMUX, &val); + + return (val & AIC32X4_CODEC_CLKIN_MASK) >> AIC32X4_CODEC_CLKIN_SHIFT; +} + +static const struct clk_ops aic32x4_codec_clkin_ops = { + .set_parent = clk_aic32x4_codec_clkin_set_parent, + .get_parent = clk_aic32x4_codec_clkin_get_parent, +}; + static struct aic32x4_clkdesc aic32x4_clkdesc_array[] = { { .name = "pll", @@ -274,6 +298,14 @@ static struct aic32x4_clkdesc aic32x4_clkdesc_array[] = { .ops = &aic32x4_pll_ops, .reg = 0, }, + { + .name = "codec_clkin", + .parent_names = + (const char *[]) { "mclk", "bclk", "gpio", "pll" }, + .num_parents = 4, + .ops = &aic32x4_codec_clkin_ops, + .reg = 0, + }, }; static struct clk *aic32x4_register_clk(struct device *dev, @@ -314,6 +346,8 @@ int aic32x4_register_clocks(struct device *dev, const char *mclk_name) */ aic32x4_clkdesc_array[0].parent_names = (const char* []) { mclk_name, "bclk", "gpio", "din" }; + aic32x4_clkdesc_array[1].parent_names = + (const char *[]) { mclk_name, "bclk", "gpio", "pll" }; for (i = 0; i < ARRAY_SIZE(aic32x4_clkdesc_array); ++i) aic32x4_register_clk(dev, &aic32x4_clkdesc_array[i]); diff --git a/sound/soc/codecs/tlv320aic32x4.c b/sound/soc/codecs/tlv320aic32x4.c index 7cf8c7cedfe1..5496e4e080f4 100644 --- a/sound/soc/codecs/tlv320aic32x4.c +++ b/sound/soc/codecs/tlv320aic32x4.c @@ -735,12 +735,9 @@ static int aic32x4_setup_clocks(struct snd_soc_component *component, aic32x4_set_processing_blocks(component, aic32x4_divs[i].r_block, aic32x4_divs[i].p_block); - /* PLL as CODEC_CLKIN */ - snd_soc_component_update_bits(component, AIC32X4_CLKMUX, - AIC32X4_CODEC_CLKIN_MASK, - AIC32X4_CODEC_CLKIN_PLL << AIC32X4_CODEC_CLKIN_SHIFT); /* DAC_MOD_CLK as BDIV_CLKIN */ - snd_soc_component_update_bits(component, AIC32X4_IFACE3, AIC32X4_BDIVCLK_MASK, + snd_soc_component_update_bits(component, AIC32X4_IFACE3, + AIC32X4_BDIVCLK_MASK, AIC32X4_DACMOD2BCLK << AIC32X4_BDIVCLK_SHIFT); /* NDAC divider value */ @@ -987,6 +984,15 @@ static int aic32x4_component_probe(struct snd_soc_component *component) { struct aic32x4_priv *aic32x4 = snd_soc_component_get_drvdata(component); u32 tmp_reg; + int ret; + + struct clk_bulk_data clocks[] = { + { .id = "codec_clkin" }, + }; + + ret = devm_clk_bulk_get(component->dev, ARRAY_SIZE(clocks), clocks); + if (ret) + return ret; if (gpio_is_valid(aic32x4->rstn_gpio)) { ndelay(10); @@ -999,6 +1005,8 @@ static int aic32x4_component_probe(struct snd_soc_component *component) if (aic32x4->setup) aic32x4_setup_gpios(component); + clk_set_parent(clocks[0].clk, clocks[1].clk); + /* Power platform configuration */ if (aic32x4->power_cfg & AIC32X4_PWR_MICBIAS_2075_LDOIN) { snd_soc_component_write(component, AIC32X4_MICBIAS, -- 2.20.1

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[alsa-devel] Applied "ASoC: tlv320aic32x4: Model BDIV divider in CCF" to the asoc tree
by Mark Brown 25 Mar '19

25 Mar '19

The patch ASoC: tlv320aic32x4: Model BDIV divider in CCF has been applied to the asoc tree at https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git All being well this means that it will be integrated into the linux-next tree (usually sometime in the next 24 hours) and sent to Linus during the next merge window (or sooner if it is a bug fix), however if problems are discovered then the patch may be dropped or reverted. You may get further e-mails resulting from automated or manual testing and review of the tree, please engage with people reporting problems and send followup patches addressing any issues that are reported if needed. If any updates are required or you are submitting further changes they should be sent as incremental updates against current git, existing patches will not be replaced. Please add any relevant lists and maintainers to the CCs when replying to this mail. Thanks, Mark >From 9b484124ebd906c4d6bc826cc0d417e80cc1105c Mon Sep 17 00:00:00 2001 From: Annaliese McDermond <nh6z(a)nh6z.net> Date: Thu, 21 Mar 2019 17:58:48 -0700 Subject: [PATCH] ASoC: tlv320aic32x4: Model BDIV divider in CCF Model and manage BDIV divider as components in the Core Clock Framework. This should allow us to do some more complex clock management and power control. Also, some of the on-board chip clocks can be exposed to the outside, and this change will make those clocks easier to consume by other parts of the kernel. Signed-off-by: Annaliese McDermond <nh6z(a)nh6z.net> Signed-off-by: Mark Brown <broonie(a)kernel.org> --- sound/soc/codecs/tlv320aic32x4-clk.c | 36 ++++++++++++++++++ sound/soc/codecs/tlv320aic32x4.c | 56 +++++++++++++--------------- 2 files changed, 62 insertions(+), 30 deletions(-) diff --git a/sound/soc/codecs/tlv320aic32x4-clk.c b/sound/soc/codecs/tlv320aic32x4-clk.c index daf14924e324..667ec2c03508 100644 --- a/sound/soc/codecs/tlv320aic32x4-clk.c +++ b/sound/soc/codecs/tlv320aic32x4-clk.c @@ -351,6 +351,34 @@ static const struct clk_ops aic32x4_div_ops = { .recalc_rate = clk_aic32x4_div_recalc_rate, }; +static int clk_aic32x4_bdiv_set_parent(struct clk_hw *hw, u8 index) +{ + struct clk_aic32x4 *mux = to_clk_aic32x4(hw); + + return regmap_update_bits(mux->regmap, AIC32X4_IFACE3, + AIC32X4_BDIVCLK_MASK, index); +} + +static u8 clk_aic32x4_bdiv_get_parent(struct clk_hw *hw) +{ + struct clk_aic32x4 *mux = to_clk_aic32x4(hw); + unsigned int val; + + regmap_read(mux->regmap, AIC32X4_IFACE3, &val); + + return val & AIC32X4_BDIVCLK_MASK; +} + +static const struct clk_ops aic32x4_bdiv_ops = { + .prepare = clk_aic32x4_div_prepare, + .unprepare = clk_aic32x4_div_unprepare, + .set_parent = clk_aic32x4_bdiv_set_parent, + .get_parent = clk_aic32x4_bdiv_get_parent, + .set_rate = clk_aic32x4_div_set_rate, + .round_rate = clk_aic32x4_div_round_rate, + .recalc_rate = clk_aic32x4_div_recalc_rate, +}; + static struct aic32x4_clkdesc aic32x4_clkdesc_array[] = { { .name = "pll", @@ -396,6 +424,14 @@ static struct aic32x4_clkdesc aic32x4_clkdesc_array[] = { .ops = &aic32x4_div_ops, .reg = AIC32X4_MADC, }, + { + .name = "bdiv", + .parent_names = + (const char *[]) { "ndac", "mdac", "nadc", "madc" }, + .num_parents = 4, + .ops = &aic32x4_bdiv_ops, + .reg = AIC32X4_BCLKN, + }, }; static struct clk *aic32x4_register_clk(struct device *dev, diff --git a/sound/soc/codecs/tlv320aic32x4.c b/sound/soc/codecs/tlv320aic32x4.c index 0cf942938372..bf9ccda6616d 100644 --- a/sound/soc/codecs/tlv320aic32x4.c +++ b/sound/soc/codecs/tlv320aic32x4.c @@ -57,7 +57,7 @@ struct aic32x4_rate_divs { u8 aosr; unsigned long nadc_rate; unsigned long madc_rate; - u8 blck_N; + unsigned long bdiv_rate; u8 r_block; u8 p_block; }; @@ -310,53 +310,53 @@ static const struct snd_kcontrol_new aic32x4_snd_controls[] = { static const struct aic32x4_rate_divs aic32x4_divs[] = { /* 8k rate */ { 12000000, 8000, 57120000, 768, 18432000, 6144000, 128, 18432000, - 1024000, 24, 1, 1 }, + 1024000, 256000, 1, 1 }, { 24000000, 8000, 57120000, 768, 6144000, 6144000, 64, 2048000, - 512000, 24, 1, 1 }, + 512000, 256000, 1, 1 }, { 25000000, 8000, 32620000, 768, 6144000, 6144000, 64, 2048000, - 512000, 24, 1, 1 }, + 512000, 256000, 1, 1 }, /* 11.025k rate */ { 12000000, 11025, 44217600, 512, 11289600, 5644800, 128, 11289600, - 1411200, 16, 1, 1 }, + 1411200, 352800, 1, 1 }, { 24000000, 11025, 44217600, 512, 5644800, 5644800, 64, 2822400, - 705600, 16, 1, 1 }, + 705600, 352800, 1, 1 }, /* 16k rate */ { 12000000, 16000, 57120000, 384, 18432000, 6144000, 128, 18432000, - 2048000, 12, 1, 1 }, + 2048000, 512000, 1, 1 }, { 24000000, 16000, 57120000, 384, 6144000, 6144000, 64, 5120000, - 1024000, 12, 1, 1 }, + 1024000, 512000, 1, 1 }, { 25000000, 16000, 32620000, 384, 6144000, 6144000, 64, 5120000, - 1024000, 12, 1, 1 }, + 1024000, 512000, 1, 1 }, /* 22.05k rate */ { 12000000, 22050, 44217600, 256, 22579200, 5644800, 128, 22579200, - 2822400, 8, 1, 1 }, + 2822400, 705600, 1, 1 }, { 24000000, 22050, 44217600, 256, 5644800, 5644800, 64, 5644800, - 1411200, 8, 1, 1 }, + 1411200, 705600, 1, 1 }, { 25000000, 22050, 19713750, 256, 5644800, 5644800, 64, 5644800, - 1411200, 8, 1, 1 }, + 1411200, 705600, 1, 1 }, /* 32k rate */ { 12000000, 32000, 14112000, 192, 43008000, 6144000, 64, 43008000, - 2048000, 6, 1, 1 }, + 2048000, 1024000, 1, 1 }, { 24000000, 32000, 14112000, 192, 12288000, 6144000, 64, 12288000, - 2048000, 6, 1, 1 }, + 2048000, 1024000, 1, 1 }, /* 44.1k rate */ { 12000000, 44100, 44217600, 128, 45158400, 5644800, 128, 45158400, - 5644800, 4, 1, 1 }, + 5644800, 1411200, 1, 1 }, { 24000000, 44100, 44217600, 128, 11289600, 5644800, 64, 11289600, - 2822400, 4, 1, 1 }, + 2822400, 1411200, 1, 1 }, { 25000000, 44100, 19713750, 128, 11289600, 5644800, 64, 11289600, - 2822400, 4, 1, 1 }, + 2822400, 1411200, 1, 1 }, /* 48k rate */ { 12000000, 48000, 18432000, 128, 49152000, 6144000, 128, 49152000, - 6144000, 4, 1, 1 }, + 6144000, 1536000, 1, 1 }, { 24000000, 48000, 18432000, 128, 12288000, 6144000, 64, 12288000, - 3072000, 4, 1, 1 }, + 3072000, 1536000, 1, 1 }, { 25000000, 48000, 75626250, 128, 12288000, 6144000, 64, 12288000, - 3072000, 4, 1, 1 }, + 3072000, 1536000, 1, 1 }, /* 96k rate */ { 25000000, 96000, 75626250, 64, 24576000, 6144000, 64, 24576000, - 6144000, 1, 1, 9 }, + 6144000, 3072000, 1, 9 }, }; static const struct snd_kcontrol_new hpl_output_mixer_controls[] = { @@ -743,6 +743,7 @@ static int aic32x4_setup_clocks(struct snd_soc_component *component, { .id = "madc" }, { .id = "ndac" }, { .id = "mdac" }, + { .id = "bdiv" }, }; i = aic32x4_get_divs(parent_rate, sample_rate); @@ -760,14 +761,10 @@ static int aic32x4_setup_clocks(struct snd_soc_component *component, clk_set_rate(clocks[2].clk, aic32x4_divs[i].madc_rate); clk_set_rate(clocks[3].clk, aic32x4_divs[i].ndac_rate); clk_set_rate(clocks[4].clk, aic32x4_divs[i].mdac_rate); + clk_set_rate(clocks[5].clk, aic32x4_divs[i].bdiv_rate); aic32x4_set_processing_blocks(component, aic32x4_divs[i].r_block, aic32x4_divs[i].p_block); - /* DAC_MOD_CLK as BDIV_CLKIN */ - snd_soc_component_update_bits(component, AIC32X4_IFACE3, - AIC32X4_BDIVCLK_MASK, - AIC32X4_DACMOD2BCLK << AIC32X4_BDIVCLK_SHIFT); - /* DOSR MSB & LSB values */ snd_soc_component_write(component, AIC32X4_DOSRMSB, aic32x4_divs[i].dosr >> 8); snd_soc_component_write(component, AIC32X4_DOSRLSB, (aic32x4_divs[i].dosr & 0xff)); @@ -775,10 +772,6 @@ static int aic32x4_setup_clocks(struct snd_soc_component *component, /* AOSR value */ snd_soc_component_write(component, AIC32X4_AOSR, aic32x4_divs[i].aosr); - /* BCLK N divider */ - snd_soc_component_update_bits(component, AIC32X4_BCLKN, - AIC32X4_BCLK_MASK, aic32x4_divs[i].blck_N); - return 0; } @@ -1001,6 +994,8 @@ static int aic32x4_component_probe(struct snd_soc_component *component) struct clk_bulk_data clocks[] = { { .id = "codec_clkin" }, { .id = "pll" }, + { .id = "bdiv" }, + { .id = "mdac" }, }; ret = devm_clk_bulk_get(component->dev, ARRAY_SIZE(clocks), clocks); @@ -1019,6 +1014,7 @@ static int aic32x4_component_probe(struct snd_soc_component *component) aic32x4_setup_gpios(component); clk_set_parent(clocks[0].clk, clocks[1].clk); + clk_set_parent(clocks[2].clk, clocks[3].clk); /* Power platform configuration */ if (aic32x4->power_cfg & AIC32X4_PWR_MICBIAS_2075_LDOIN) { -- 2.20.1

1 0

[alsa-devel] Applied "ASoC: tlv320aic32x4: Control clock gating with CCF" to the asoc tree
by Mark Brown 25 Mar '19

25 Mar '19

The patch ASoC: tlv320aic32x4: Control clock gating with CCF has been applied to the asoc tree at https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git All being well this means that it will be integrated into the linux-next tree (usually sometime in the next 24 hours) and sent to Linus during the next merge window (or sooner if it is a bug fix), however if problems are discovered then the patch may be dropped or reverted. You may get further e-mails resulting from automated or manual testing and review of the tree, please engage with people reporting problems and send followup patches addressing any issues that are reported if needed. If any updates are required or you are submitting further changes they should be sent as incremental updates against current git, existing patches will not be replaced. Please add any relevant lists and maintainers to the CCs when replying to this mail. Thanks, Mark >From d25970b5fd51e9fcf0afbe190908ea4049454da4 Mon Sep 17 00:00:00 2001 From: Annaliese McDermond <nh6z(a)nh6z.net> Date: Thu, 21 Mar 2019 17:58:49 -0700 Subject: [PATCH] ASoC: tlv320aic32x4: Control clock gating with CCF Control the clock gating to the various clock components to use the CCF. This allows us to prepare_enalbe only 3 clocks and the relationships assigned to them will cause upstream clockss to enable automatically. Additionally we can do this in a single call to the CCF. Signed-off-by: Annaliese McDermond <nh6z(a)nh6z.net> Signed-off-by: Mark Brown <broonie(a)kernel.org> --- sound/soc/codecs/tlv320aic32x4.c | 67 +++++++------------------------- 1 file changed, 13 insertions(+), 54 deletions(-) diff --git a/sound/soc/codecs/tlv320aic32x4.c b/sound/soc/codecs/tlv320aic32x4.c index bf9ccda6616d..c3e9f65b26a7 100644 --- a/sound/soc/codecs/tlv320aic32x4.c +++ b/sound/soc/codecs/tlv320aic32x4.c @@ -834,41 +834,25 @@ static int aic32x4_mute(struct snd_soc_dai *dai, int mute) static int aic32x4_set_bias_level(struct snd_soc_component *component, enum snd_soc_bias_level level) { - struct aic32x4_priv *aic32x4 = snd_soc_component_get_drvdata(component); int ret; + struct clk_bulk_data clocks[] = { + { .id = "madc" }, + { .id = "mdac" }, + { .id = "bdiv" }, + }; + + ret = devm_clk_bulk_get(component->dev, ARRAY_SIZE(clocks), clocks); + if (ret) + return ret; + switch (level) { case SND_SOC_BIAS_ON: - /* Switch on master clock */ - ret = clk_prepare_enable(aic32x4->mclk); + ret = clk_bulk_prepare_enable(ARRAY_SIZE(clocks), clocks); if (ret) { - dev_err(component->dev, "Failed to enable master clock\n"); + dev_err(component->dev, "Failed to enable clocks\n"); return ret; } - - /* Switch on PLL */ - snd_soc_component_update_bits(component, AIC32X4_PLLPR, - AIC32X4_PLLEN, AIC32X4_PLLEN); - - /* Switch on NDAC Divider */ - snd_soc_component_update_bits(component, AIC32X4_NDAC, - AIC32X4_NDACEN, AIC32X4_NDACEN); - - /* Switch on MDAC Divider */ - snd_soc_component_update_bits(component, AIC32X4_MDAC, - AIC32X4_MDACEN, AIC32X4_MDACEN); - - /* Switch on NADC Divider */ - snd_soc_component_update_bits(component, AIC32X4_NADC, - AIC32X4_NADCEN, AIC32X4_NADCEN); - - /* Switch on MADC Divider */ - snd_soc_component_update_bits(component, AIC32X4_MADC, - AIC32X4_MADCEN, AIC32X4_MADCEN); - - /* Switch on BCLK_N Divider */ - snd_soc_component_update_bits(component, AIC32X4_BCLKN, - AIC32X4_BCLKEN, AIC32X4_BCLKEN); break; case SND_SOC_BIAS_PREPARE: break; @@ -877,32 +861,7 @@ static int aic32x4_set_bias_level(struct snd_soc_component *component, if (snd_soc_component_get_bias_level(component) == SND_SOC_BIAS_OFF) break; - /* Switch off BCLK_N Divider */ - snd_soc_component_update_bits(component, AIC32X4_BCLKN, - AIC32X4_BCLKEN, 0); - - /* Switch off MADC Divider */ - snd_soc_component_update_bits(component, AIC32X4_MADC, - AIC32X4_MADCEN, 0); - - /* Switch off NADC Divider */ - snd_soc_component_update_bits(component, AIC32X4_NADC, - AIC32X4_NADCEN, 0); - - /* Switch off MDAC Divider */ - snd_soc_component_update_bits(component, AIC32X4_MDAC, - AIC32X4_MDACEN, 0); - - /* Switch off NDAC Divider */ - snd_soc_component_update_bits(component, AIC32X4_NDAC, - AIC32X4_NDACEN, 0); - - /* Switch off PLL */ - snd_soc_component_update_bits(component, AIC32X4_PLLPR, - AIC32X4_PLLEN, 0); - - /* Switch off master clock */ - clk_disable_unprepare(aic32x4->mclk); + clk_bulk_disable_unprepare(ARRAY_SIZE(clocks), clocks); break; case SND_SOC_BIAS_OFF: break; -- 2.20.1

1 0

[alsa-devel] Applied "ASoC: tlv320aic32x4: Move aosr and dosr setting to separate functions" to the asoc tree
by Mark Brown 25 Mar '19

25 Mar '19

The patch ASoC: tlv320aic32x4: Move aosr and dosr setting to separate functions has been applied to the asoc tree at https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git All being well this means that it will be integrated into the linux-next tree (usually sometime in the next 24 hours) and sent to Linus during the next merge window (or sooner if it is a bug fix), however if problems are discovered then the patch may be dropped or reverted. You may get further e-mails resulting from automated or manual testing and review of the tree, please engage with people reporting problems and send followup patches addressing any issues that are reported if needed. If any updates are required or you are submitting further changes they should be sent as incremental updates against current git, existing patches will not be replaced. Please add any relevant lists and maintainers to the CCs when replying to this mail. Thanks, Mark >From fbafbf6517274a797e6e6508c18dd8dba5920c89 Mon Sep 17 00:00:00 2001 From: Annaliese McDermond <nh6z(a)nh6z.net> Date: Thu, 21 Mar 2019 17:58:50 -0700 Subject: [PATCH] ASoC: tlv320aic32x4: Move aosr and dosr setting to separate functions Move these to separate helper functions. This looks cleaner and fits better with the new clock setting in CCF. Signed-off-by: Annaliese McDermond <nh6z(a)nh6z.net> Signed-off-by: Mark Brown <broonie(a)kernel.org> --- sound/soc/codecs/tlv320aic32x4.c | 24 +++++++++++++++++------- 1 file changed, 17 insertions(+), 7 deletions(-) diff --git a/sound/soc/codecs/tlv320aic32x4.c b/sound/soc/codecs/tlv320aic32x4.c index c3e9f65b26a7..bf3a80237b03 100644 --- a/sound/soc/codecs/tlv320aic32x4.c +++ b/sound/soc/codecs/tlv320aic32x4.c @@ -718,6 +718,20 @@ static int aic32x4_set_dai_fmt(struct snd_soc_dai *codec_dai, unsigned int fmt) return 0; } +static int aic32x4_set_aosr(struct snd_soc_component *component, u8 aosr) +{ + return snd_soc_component_write(component, AIC32X4_AOSR, aosr); +} + +static int aic32x4_set_dosr(struct snd_soc_component *component, u16 dosr) +{ + snd_soc_component_write(component, AIC32X4_DOSRMSB, dosr >> 8); + snd_soc_component_write(component, AIC32X4_DOSRLSB, + (dosr & 0xff)); + + return 0; +} + static int aic32x4_set_processing_blocks(struct snd_soc_component *component, u8 r_block, u8 p_block) { @@ -763,14 +777,10 @@ static int aic32x4_setup_clocks(struct snd_soc_component *component, clk_set_rate(clocks[4].clk, aic32x4_divs[i].mdac_rate); clk_set_rate(clocks[5].clk, aic32x4_divs[i].bdiv_rate); - aic32x4_set_processing_blocks(component, aic32x4_divs[i].r_block, aic32x4_divs[i].p_block); + aic32x4_set_aosr(component, aic32x4_divs[i].aosr); + aic32x4_set_dosr(component, aic32x4_divs[i].dosr); - /* DOSR MSB & LSB values */ - snd_soc_component_write(component, AIC32X4_DOSRMSB, aic32x4_divs[i].dosr >> 8); - snd_soc_component_write(component, AIC32X4_DOSRLSB, (aic32x4_divs[i].dosr & 0xff)); - - /* AOSR value */ - snd_soc_component_write(component, AIC32X4_AOSR, aic32x4_divs[i].aosr); + aic32x4_set_processing_blocks(component, aic32x4_divs[i].r_block, aic32x4_divs[i].p_block); return 0; } -- 2.20.1

1 0

[alsa-devel] Applied "ASoC: tlv320aic32x4: Restructure set_dai_sysclk" to the asoc tree
by Mark Brown 25 Mar '19

25 Mar '19

The patch ASoC: tlv320aic32x4: Restructure set_dai_sysclk has been applied to the asoc tree at https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git All being well this means that it will be integrated into the linux-next tree (usually sometime in the next 24 hours) and sent to Linus during the next merge window (or sooner if it is a bug fix), however if problems are discovered then the patch may be dropped or reverted. You may get further e-mails resulting from automated or manual testing and review of the tree, please engage with people reporting problems and send followup patches addressing any issues that are reported if needed. If any updates are required or you are submitting further changes they should be sent as incremental updates against current git, existing patches will not be replaced. Please add any relevant lists and maintainers to the CCs when replying to this mail. Thanks, Mark >From aa6a60f7be925210d5156f0e8025f3afe1f4f54d Mon Sep 17 00:00:00 2001 From: Annaliese McDermond <nh6z(a)nh6z.net> Date: Thu, 21 Mar 2019 17:58:52 -0700 Subject: [PATCH] ASoC: tlv320aic32x4: Restructure set_dai_sysclk The sysclk is now managed by the CCF. Change this function to merely find the system clock and set it using clk_set_rate. Signed-off-by: Annaliese McDermond <nh6z(a)nh6z.net> Signed-off-by: Mark Brown <broonie(a)kernel.org> --- sound/soc/codecs/tlv320aic32x4.c | 17 ++++++----------- 1 file changed, 6 insertions(+), 11 deletions(-) diff --git a/sound/soc/codecs/tlv320aic32x4.c b/sound/soc/codecs/tlv320aic32x4.c index 625528500f8d..289bf411e60e 100644 --- a/sound/soc/codecs/tlv320aic32x4.c +++ b/sound/soc/codecs/tlv320aic32x4.c @@ -49,7 +49,6 @@ struct aic32x4_priv { struct regmap *regmap; - u32 sysclk; u32 power_cfg; u32 micpga_routing; bool swapdacs; @@ -567,17 +566,13 @@ static int aic32x4_set_dai_sysclk(struct snd_soc_dai *codec_dai, int clk_id, unsigned int freq, int dir) { struct snd_soc_component *component = codec_dai->component; - struct aic32x4_priv *aic32x4 = snd_soc_component_get_drvdata(component); + struct clk *mclk; + struct clk *pll; - switch (freq) { - case 12000000: - case 24000000: - case 25000000: - aic32x4->sysclk = freq; - return 0; - } - printk(KERN_ERR "aic32x4: invalid frequency to set DAI system clock\n"); - return -EINVAL; + pll = devm_clk_get(component->dev, "pll"); + mclk = clk_get_parent(pll); + + return clk_set_rate(mclk, freq); } static int aic32x4_set_dai_fmt(struct snd_soc_dai *codec_dai, unsigned int fmt) -- 2.20.1

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[alsa-devel] Applied "ASoC: tlv320aic32x4: Remove mclk references" to the asoc tree
by Mark Brown 25 Mar '19

25 Mar '19

The patch ASoC: tlv320aic32x4: Remove mclk references has been applied to the asoc tree at https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git All being well this means that it will be integrated into the linux-next tree (usually sometime in the next 24 hours) and sent to Linus during the next merge window (or sooner if it is a bug fix), however if problems are discovered then the patch may be dropped or reverted. You may get further e-mails resulting from automated or manual testing and review of the tree, please engage with people reporting problems and send followup patches addressing any issues that are reported if needed. If any updates are required or you are submitting further changes they should be sent as incremental updates against current git, existing patches will not be replaced. Please add any relevant lists and maintainers to the CCs when replying to this mail. Thanks, Mark >From 78f2d58a289302e56a7def96a783a7686ebf27e2 Mon Sep 17 00:00:00 2001 From: Annaliese McDermond <nh6z(a)nh6z.net> Date: Thu, 21 Mar 2019 17:58:53 -0700 Subject: [PATCH] ASoC: tlv320aic32x4: Remove mclk references mclk is not used by anything anymore. Remove support for it. All that information now comes from the clock tree. Signed-off-by: Annaliese McDermond <nh6z(a)nh6z.net> Signed-off-by: Mark Brown <broonie(a)kernel.org> --- sound/soc/codecs/tlv320aic32x4.c | 7 ------- 1 file changed, 7 deletions(-) diff --git a/sound/soc/codecs/tlv320aic32x4.c b/sound/soc/codecs/tlv320aic32x4.c index 289bf411e60e..a5457d3de1b1 100644 --- a/sound/soc/codecs/tlv320aic32x4.c +++ b/sound/soc/codecs/tlv320aic32x4.c @@ -53,7 +53,6 @@ struct aic32x4_priv { u32 micpga_routing; bool swapdacs; int rstn_gpio; - struct clk *mclk; const char *mclk_name; struct regulator *supply_ldo; @@ -1190,12 +1189,6 @@ int aic32x4_probe(struct device *dev, struct regmap *regmap) aic32x4->mclk_name = "mclk"; } - aic32x4->mclk = devm_clk_get(dev, "mclk"); - if (IS_ERR(aic32x4->mclk)) { - dev_err(dev, "Failed getting the mclk. The current implementation does not support the usage of this codec without mclk\n"); - return PTR_ERR(aic32x4->mclk); - } - ret = aic32x4_register_clocks(dev, aic32x4->mclk_name); if (ret) return ret; -- 2.20.1

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