December 2017 - Alsa-devel - mailman.alsa-project.org

[alsa-devel] [PATCH v3] ASoC: ak4613: call dummy write for PW_MGMT1/3 when Playback
by Kuninori Morimoto 01 Dec '17

01 Dec '17

From: Kuninori Morimoto <kuninori.morimoto.gx(a)renesas.com> Power Down Release Command (PMVR, PMDAC, RSTN, PMDA1-PMDA6) which are located on PW_MGMT1 / PW_MGMT3 register must be write again after at least 5 LRCK cycle or later on each command. Otherwise, Playback volume will be 0dB. Basically, it should be 1. PowerDownRelease by Power Management1 <= call 1.x after 5LRCK 1.x Dummy write to Power Management1 2. PowerDownRelease by Power Management3 <= call 2.x after 5LRCK 2.x Dummy write to Power Management3 To avoid too many dummy write, this patch is merging these. 1. PowerDownRelease by Power Management1 2. PowerDownRelease by Power Management3 <= call after 5LRCK 2.x Dummy write to Power Management1/3 <= merge dummy write This patch adds dummy write when Playback Start timing. Tested-by: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx(a)renesas.com> Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx(a)renesas.com> --- v2 -> v3 - use delayed_work with 0 delay Sakamoto-san This patch uses delayed_work with 0 delay, thus, call-back function will be called imminently. There was 0 jiffies delay between trigger <-> callback in my test. sound/soc/codecs/ak4613.c | 60 +++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 60 insertions(+) diff --git a/sound/soc/codecs/ak4613.c b/sound/soc/codecs/ak4613.c index ee9e822..a7856d5 100644 --- a/sound/soc/codecs/ak4613.c +++ b/sound/soc/codecs/ak4613.c @@ -15,6 +15,7 @@ */ #include <linux/clk.h> +#include <linux/delay.h> #include <linux/i2c.h> #include <linux/slab.h> #include <linux/of_device.h> @@ -95,6 +96,9 @@ struct ak4613_priv { struct mutex lock; const struct ak4613_interface *iface; struct snd_pcm_hw_constraint_list constraint; + struct delayed_work dummy_write_work; + struct snd_soc_component *component; + unsigned int rate; unsigned int sysclk; unsigned int fmt; @@ -392,6 +396,7 @@ static int ak4613_dai_hw_params(struct snd_pcm_substream *substream, default: return -EINVAL; } + priv->rate = rate; /* * FIXME @@ -467,11 +472,65 @@ static int ak4613_set_bias_level(struct snd_soc_component *component, return 0; } +static void ak4613_dummy_write(struct work_struct *work) +{ + struct ak4613_priv *priv = container_of(work, + struct ak4613_priv, + dummy_write_work.work); + struct snd_soc_component *component = priv->component; + unsigned int mgmt1; + unsigned int mgmt3; + + /* wait 5 LR clocks */ + udelay(5000000 / priv->rate); + + snd_soc_component_read(component, PW_MGMT1, &mgmt1); + snd_soc_component_read(component, PW_MGMT3, &mgmt3); + + snd_soc_component_write(component, PW_MGMT1, mgmt1); + snd_soc_component_write(component, PW_MGMT3, mgmt3); +} + +static int ak4613_dai_trigger(struct snd_pcm_substream *substream, int cmd, + struct snd_soc_dai *dai) +{ + struct snd_soc_codec *codec = dai->codec; + struct ak4613_priv *priv = snd_soc_codec_get_drvdata(codec); + + /* + * FIXME + * + * PW_MGMT1 / PW_MGMT3 needs dummy write at least after 5 LR clocks + * from Power Down Release. Otherwise, Playback volume will be 0dB. + * To avoid complex multiple delay/dummy_write method from + * ak4613_set_bias_level() / SND_SOC_DAPM_DAC_E("DACx", ...), + * call it once here. + * + * But, unfortunately, we can't "write" here because here is atomic + * context (It uses I2C access for write). + * Thus, use delayed work with 0 delay to switch to normal context + * immediately, and wait 5 LR clocks and do dummy_write there. + */ + + if ((cmd != SNDRV_PCM_TRIGGER_START) && + (cmd != SNDRV_PCM_TRIGGER_RESUME)) + return 0; + + if (substream->stream != SNDRV_PCM_STREAM_PLAYBACK) + return 0; + + priv->component = &codec->component; + schedule_delayed_work(&priv->dummy_write_work, 0); + + return 0; +} + static const struct snd_soc_dai_ops ak4613_dai_ops = { .startup = ak4613_dai_startup, .shutdown = ak4613_dai_shutdown, .set_sysclk = ak4613_dai_set_sysclk, .set_fmt = ak4613_dai_set_fmt, + .trigger = ak4613_dai_trigger, .hw_params = ak4613_dai_hw_params, }; @@ -591,6 +650,7 @@ static int ak4613_i2c_probe(struct i2c_client *i2c, priv->iface = NULL; priv->cnt = 0; priv->sysclk = 0; + INIT_DELAYED_WORK(&priv->dummy_write_work, ak4613_dummy_write); mutex_init(&priv->lock); -- 1.9.1

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[alsa-devel] Doc.../sound/soc/platform.rst: snd_soc_platform_driver out of sync
by Andrey Utkin 01 Dec '17

01 Dec '17

Hi maintainers of Sound and/or Docs. Documentation/sound/soc/platform.rst quotes outdated definition of "struct snd_soc_platform_driver". I spotted this because it shows like there are suspend/resume function pointers while this is no longer true. I don't have a good idea how to update the doc, I am just sure that mere update of the struct definition is not the way to go. Hope this report helps. Thanks for you work!

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[alsa-devel] [PATCH v4 2/2] ASoC: fsl_ssi: add 20-bit sample format for AC'97 and use it for capture
by Maciej S. Szmigiero 01 Dec '17

01 Dec '17

When testing AC'97 capture on UDOO board (currently the only user of fsl_ssi driver in the AC'97 mode) it become obvious that there is a massive distortion above certain, small input signal. This problem has been traced to silicon errata ERR003778: "In AC97, 16-bit mode, received data is shifted by 4-bit locations" that has "No fix scheduled". This errata suggests a workaround of doing a 4-bit shift back in SDMA script for this specific operation mode, however our SDMA scripts are shared between various SoC peripherals so we can't really modify them. There is a simple way to avoid this problem, however, that is to disallow recording in 16-bit mode and only support it in AC'97-native 20-bit mode. We have to use a 4-byte format for this since SSI FIFOs do not allow 3-byte accesses (and these aren't supported by imx-sdma driver anyway). With this change the capture distortion is gone. We can also add this format as an additional one supported for playback, using this opportunity to make sure that we use CPU-endian-native formats in AC'97 mode as we already do in I2S mode. There is no problem in using different bit widths in playback and capture in AC'97 mode so allow this, too. Signed-off-by: Maciej S. Szmigiero <mail(a)maciej.szmigiero.name> --- Changes from v1: Adapt format name to changes in the first patch from this series. Changes from v2, v3: None. sound/soc/fsl/fsl_ssi.c | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/sound/soc/fsl/fsl_ssi.c b/sound/soc/fsl/fsl_ssi.c index 20ef09e1a395..c350117c8e31 100644 --- a/sound/soc/fsl/fsl_ssi.c +++ b/sound/soc/fsl/fsl_ssi.c @@ -1278,14 +1278,15 @@ static struct snd_soc_dai_driver fsl_ssi_ac97_dai = { .channels_min = 2, .channels_max = 2, .rates = SNDRV_PCM_RATE_8000_48000, - .formats = SNDRV_PCM_FMTBIT_S16_LE, + .formats = SNDRV_PCM_FMTBIT_S16 | SNDRV_PCM_FMTBIT_S20, }, .capture = { .stream_name = "AC97 Capture", .channels_min = 2, .channels_max = 2, .rates = SNDRV_PCM_RATE_48000, - .formats = SNDRV_PCM_FMTBIT_S16_LE, + /* 16-bit capture is broken (errata ERR003778) */ + .formats = SNDRV_PCM_FMTBIT_S20, }, .ops = &fsl_ssi_dai_ops, }; @@ -1557,11 +1558,12 @@ static int fsl_ssi_probe(struct platform_device *pdev) /* Are the RX and the TX clocks locked? */ if (!of_find_property(np, "fsl,ssi-asynchronous", NULL)) { - if (!fsl_ssi_is_ac97(ssi_private)) + if (!fsl_ssi_is_ac97(ssi_private)) { ssi_private->cpu_dai_drv.symmetric_rates = 1; + ssi_private->cpu_dai_drv.symmetric_samplebits = 1; + } ssi_private->cpu_dai_drv.symmetric_channels = 1; - ssi_private->cpu_dai_drv.symmetric_samplebits = 1; } /* Determine the FIFO depth. */

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[alsa-devel] [PATCH v2] ASoC: ak4613: call dummy write for PW_MGMT1/3 when Playback
by Kuninori Morimoto 01 Dec '17

01 Dec '17

From: Kuninori Morimoto <kuninori.morimoto.gx(a)renesas.com> Power Down Release Command (PMVR, PMDAC, RSTN, PMDA1-PMDA6) which are located on PW_MGMT1 / PW_MGMT3 register must be write again after at least 5 LRCK cycle or later on each command. Otherwise, Playback volume will be 0dB. Basically, it should be 1. PowerDownRelease by Power Management1 <= call 1.x after 5LRCK 1.x Dummy write to Power Management1 2. PowerDownRelease by Power Management3 <= call 2.x after 5LRCK 2.x Dummy write to Power Management3 To avoid too many dummy write, this patch is merging these. 1. PowerDownRelease by Power Management1 2. PowerDownRelease by Power Management3 <= call after 5LRCK 2.x Dummy write to Power Management1/3 <= merge dummy write This patch adds dummy write when Playback Start timing. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx(a)renesas.com> --- v1 -> v2 - add more explain on log area - call dummy write after 5LRCK sound/soc/codecs/ak4613.c | 59 +++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 59 insertions(+) diff --git a/sound/soc/codecs/ak4613.c b/sound/soc/codecs/ak4613.c index ee9e822..937cff4 100644 --- a/sound/soc/codecs/ak4613.c +++ b/sound/soc/codecs/ak4613.c @@ -15,6 +15,7 @@ */ #include <linux/clk.h> +#include <linux/delay.h> #include <linux/i2c.h> #include <linux/slab.h> #include <linux/of_device.h> @@ -95,6 +96,9 @@ struct ak4613_priv { struct mutex lock; const struct ak4613_interface *iface; struct snd_pcm_hw_constraint_list constraint; + struct delayed_work dummy_write_work; + struct snd_soc_component *component; + unsigned int rate; unsigned int sysclk; unsigned int fmt; @@ -392,6 +396,7 @@ static int ak4613_dai_hw_params(struct snd_pcm_substream *substream, default: return -EINVAL; } + priv->rate = rate; /* * FIXME @@ -467,11 +472,64 @@ static int ak4613_set_bias_level(struct snd_soc_component *component, return 0; } +static void ak4613_dummy_write(struct work_struct *work) +{ + struct ak4613_priv *priv = container_of(work, + struct ak4613_priv, + dummy_write_work.work); + struct snd_soc_component *component = priv->component; + unsigned int mgmt1; + unsigned int mgmt3; + + snd_soc_component_read(component, PW_MGMT1, &mgmt1); + snd_soc_component_read(component, PW_MGMT3, &mgmt3); + + snd_soc_component_write(component, PW_MGMT1, mgmt1); + snd_soc_component_write(component, PW_MGMT3, mgmt3); +} + +static int ak4613_dai_trigger(struct snd_pcm_substream *substream, int cmd, + struct snd_soc_dai *dai) +{ + struct snd_soc_codec *codec = dai->codec; + struct ak4613_priv *priv = snd_soc_codec_get_drvdata(codec); + unsigned long delay; + + /* + * FIXME + * + * PW_MGMT1 / PW_MGMT3 needs dummy write at least after 5 LR clocks + * from Power Down Release. Otherwise, Playback volume will be 0dB. + * To avoid complex multiple delayed_work call from + * ak4613_set_bias_level() / SND_SOC_DAPM_DAC_E("DACx", ...), + * call it once here. + */ + + switch (cmd) { + case SNDRV_PCM_TRIGGER_START: + case SNDRV_PCM_TRIGGER_RESUME: + break; + default: + return 0; + } + + if (substream->stream != SNDRV_PCM_STREAM_PLAYBACK) + return 0; + + delay = 5000000 / priv->rate; + priv->component = &codec->component; + schedule_delayed_work(&priv->dummy_write_work, + usecs_to_jiffies(delay)); + + return 0; +} + static const struct snd_soc_dai_ops ak4613_dai_ops = { .startup = ak4613_dai_startup, .shutdown = ak4613_dai_shutdown, .set_sysclk = ak4613_dai_set_sysclk, .set_fmt = ak4613_dai_set_fmt, + .trigger = ak4613_dai_trigger, .hw_params = ak4613_dai_hw_params, }; @@ -591,6 +649,7 @@ static int ak4613_i2c_probe(struct i2c_client *i2c, priv->iface = NULL; priv->cnt = 0; priv->sysclk = 0; + INIT_DELAYED_WORK(&priv->dummy_write_work, ak4613_dummy_write); mutex_init(&priv->lock); -- 1.9.1

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