January 2017 - Alsa-devel - mailman.alsa-project.org

[alsa-devel] [PATCH v7 0/4] DMA Engine: switch PL330 driver to non-irq-safe runtime PM
by Marek Szyprowski 09 Feb '17

09 Feb '17

Hello, This patchset changes the way the runtime PM is implemented in the PL330 DMA engine driver. The main goal of such change is to add support for the audio power domain to Exynos5 SoCs (5250, 542x, 5433, probably others) and let it to be properly turned off, when no audio is being used. Switching to non-irq-safe runtime PM is required to properly let power domain to be turned off (irq-safe runtime PM keeps power domain turned on all the time) and to integrate with clock controller's runtime PM (this cannot be workarounded any other way, PL330 uses clocks from the controller, which belongs to the same power domain). For more details of the proposed change to the PL330 driver see patch #4. Audio power domain on Exynos5 SoCs contains following hardware modules: 1. clock controller 2. pin controller 3. PL330 DMA controller 4. I2S audio controller Patches for adding or fixing runtime PM for each of the above devices is handled separately. Runtime PM patches for clock controllers is possible and has been proposed in the following thread (pending review): "[PATCH v4 0/4] Add runtime PM support for clocks (on Exynos SoC example)", http://www.spinics.net/lists/arm-kernel/msg550747.html Runtime PM support for Exynos pin controller has been posted in the following thread: "[PATCH 0/9] Runtime PM for Exynos pin controller driver", http://www.spinics.net/lists/arm-kernel/msg550161.html Exynos I2S driver supports runtime PM, but some fixes were needed for it and they are already queued to linux-next. This patchset is based on linux-next from 25th January 2017 with "dmaengine: pl330: fix double lock" patch applied. Best regards Marek Szyprowski Samsung R&D Institute Poland Changelog: v7: - added missing of_dma_request_slave_channel API change to sound/soc/sh/rcar driver - extended commit message with information about drawbacks of irq-safe runtime pm - added Ulf's reviewed-by tags v6: https://www.spinics.net/lists/arm-kernel/msg557377.html - fixed pl330 system sleep suspend/resume callbacks, previous implementation incorrectly tried to unprepare clocks unconditionally - after a fix pl330 suspend/resume callbacks can be simply replaced by generic pm_runtime_force_{suspend,resume} helpers, what simplifies code even more v5: https://www.spinics.net/lists/arm-kernel/msg555001.html - added Acks - additional mutex is indeed not needed, rely on dma_list_mutex in dmaengine core, added comment about locking v4: http://www.spinics.net/lists/dmaengine/msg12329.html - rebased onto "dmaengine: pl330: fix double lock" patch: http://www.spinics.net/lists/dmaengine/msg12289.html - added a mutex to protect runtime PM links creation/removal to avoid races - moved mem2mem channel case handing to pl330_{add,del}_slave_pm_link functions to simplify code and error paths v3: http://www.spinics.net/lists/dmaengine/msg12245.html - removed pl330_filter function as suggested by Arnd Bergmann - removed pl330.h from arch/arm/plat-samsung/devs.c - fixes some minor style issues pointed by Krzysztof Kozlowski v2: https://www.spinics.net/lists/arm-kernel/msg552772.html - rebased onto linux next-20170109 - improved patch description - separated patch #3 from #4 (storing a pointer to slave device for each DMA channel) as requested by Krzysztof Kozlowski v1: https://www.spinics.net/lists/arm-kernel/msg550008.html - initial version Patch summary: Marek Szyprowski (4): dmaengine: pl330: remove pdata based initialization dmaengine: Forward slave device pointer to of_xlate callback dmaengine: pl330: Store pointer to slave device dmaengine: pl330: Don't require irq-safe runtime PM arch/arm/plat-samsung/devs.c | 1 - drivers/dma/amba-pl08x.c | 2 +- drivers/dma/at_hdmac.c | 4 +- drivers/dma/at_xdmac.c | 2 +- drivers/dma/bcm2835-dma.c | 2 +- drivers/dma/coh901318.c | 2 +- drivers/dma/cppi41.c | 2 +- drivers/dma/dma-jz4780.c | 2 +- drivers/dma/dmaengine.c | 2 +- drivers/dma/dw/platform.c | 2 +- drivers/dma/edma.c | 4 +- drivers/dma/fsl-edma.c | 2 +- drivers/dma/img-mdc-dma.c | 2 +- drivers/dma/imx-dma.c | 2 +- drivers/dma/imx-sdma.c | 2 +- drivers/dma/k3dma.c | 2 +- drivers/dma/lpc18xx-dmamux.c | 2 +- drivers/dma/mmp_pdma.c | 2 +- drivers/dma/mmp_tdma.c | 2 +- drivers/dma/moxart-dma.c | 2 +- drivers/dma/mxs-dma.c | 2 +- drivers/dma/nbpfaxi.c | 2 +- drivers/dma/of-dma.c | 19 ++-- drivers/dma/pl330.c | 220 ++++++++++++++++------------------------ drivers/dma/pxa_dma.c | 2 +- drivers/dma/qcom/bam_dma.c | 2 +- drivers/dma/sh/rcar-dmac.c | 2 +- drivers/dma/sh/shdma-of.c | 2 +- drivers/dma/sh/usb-dmac.c | 2 +- drivers/dma/sirf-dma.c | 2 +- drivers/dma/st_fdma.c | 2 +- drivers/dma/ste_dma40.c | 2 +- drivers/dma/stm32-dma.c | 2 +- drivers/dma/sun4i-dma.c | 2 +- drivers/dma/sun6i-dma.c | 2 +- drivers/dma/tegra20-apb-dma.c | 2 +- drivers/dma/tegra210-adma.c | 2 +- drivers/dma/xilinx/xilinx_dma.c | 2 +- drivers/dma/xilinx/zynqmp_dma.c | 2 +- drivers/dma/zx_dma.c | 2 +- include/linux/amba/pl330.h | 35 ------- include/linux/of_dma.h | 19 ++-- sound/soc/sh/rcar/dma.c | 5 +- sound/soc/sh/rcar/dvc.c | 3 +- sound/soc/sh/rcar/rsnd.h | 3 +- sound/soc/sh/rcar/src.c | 3 +- sound/soc/sh/rcar/ssi.c | 3 +- 47 files changed, 158 insertions(+), 231 deletions(-) delete mode 100644 include/linux/amba/pl330.h -- 1.9.1

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[alsa-devel] [PATCH v1 1/4] ASoC: Intel: common: Replace custom implementation of readq / writeq
by Andy Shevchenko 09 Feb '17

09 Feb '17

The readq() and writeq() helpers are available in the linux/io-64-nonatomic-hi-lo.h and linux/io-64-nonatomic-lo-hi.h headers. Replace custom implementation by the generic helpers. Signed-off-by: Andy Shevchenko <andriy.shevchenko(a)linux.intel.com> --- sound/soc/intel/common/sst-dsp.c | 9 ++++----- 1 file changed, 4 insertions(+), 5 deletions(-) diff --git a/sound/soc/intel/common/sst-dsp.c b/sound/soc/intel/common/sst-dsp.c index 11c0805393ff..748f1f5c02df 100644 --- a/sound/soc/intel/common/sst-dsp.c +++ b/sound/soc/intel/common/sst-dsp.c @@ -22,6 +22,8 @@ #include <linux/io.h> #include <linux/delay.h> +#include <linux/io-64-nonatomic-lo-hi.h> + #include "sst-dsp.h" #include "sst-dsp-priv.h" @@ -43,16 +45,13 @@ EXPORT_SYMBOL_GPL(sst_shim32_read); void sst_shim32_write64(void __iomem *addr, u32 offset, u64 value) { - memcpy_toio(addr + offset, &value, sizeof(value)); + lo_hi_writeq(value, addr + offset); } EXPORT_SYMBOL_GPL(sst_shim32_write64); u64 sst_shim32_read64(void __iomem *addr, u32 offset) { - u64 val; - - memcpy_fromio(&val, addr + offset, sizeof(val)); - return val; + return lo_hi_readq(addr + offset); } EXPORT_SYMBOL_GPL(sst_shim32_read64); -- 2.11.0

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[alsa-devel] [RFC 00/16] ASoC: hdac_hdmi: Add Support to Enable MST Audio
by jeeja.kp＠intel.com 08 Feb '17

08 Feb '17

From: Jeeja KP <jeeja.kp(a)intel.com> Display port 1.2 introduces new capability Multi-stream transport (MST) which will allow multiple stream to route to single display port where multiple monitors are connected. Multiple monitors will be connected by a MST Hub or a monitor capable of daisy-chaining. With MST support, a pin can support multiple ports and on each port a monitor can be connected. This patch series enables DP MST Audio by extending the current design from pin to port. 1. With MST, Pin mux for CVT selection will be used to select CVT for Pin-port instead of Pin. So create the pin muxes accordingly. 2. Pin is marked as MST capable when connect event reports pipe as valid. if pipe is -1, then pin is not MST capable and default to port 0. if pipe is valid, then pin is MST capable and port = pipe. 3. For MST capable pin, select the device entry before configuring the pin widget verbs controlling the sink device operations. 4. Add support to handle multiple Port mapped to same converter by enabling all the ports and configuring the port when stream is prepared. 5. i915 acomp APIs are now used to read the ELD info and support is extended for MST port as well Notes: 1. When Mutiple ports are mapped to same PCM, currenlty stream constrains will applied based on first port mapped. Jeeja KP (15): ASoC: hdac_hdmi: Begin to add support for DP Multi-stream Audio ASoC: Intel: Skylake: Add route change to rt286 machine ASoC: Intel: Skylake: Add route change to nau88l25_max98357a machine ASoC: Intel: Skylake: Add route change to nau88l25_ssm4567 machine ASoC: Intel: Skylake: Add route change to rt298 machine ASoC: Intel: Skylake: Add route change to da7219_max98357a machine ASoC: hdac_hdmi: Add support to handle MST capable pin ASoC: hdac_hdmi: Add MST verb support ASoc: hdac_hdmi: Configure pin verbs for MST ASoC: hdac_hdmi: Add support to handle Multiple Port to same PCM ASoC: Intel: Skylake: To support MST, add HDMI routes rt286 machine ASoC: Intel: Skylake: To support MST, add HDMI routes nau_max machine ASoC: Intel: Skylake: To support MST, add HDMI routes nau_ssm machine ASoC: Intel: Skylake: To support MST, add HDMI routes rt298 machine ASoC: Intel: Skylake: To support MST, add HDMI routes da7219_max machine Sandeep Tayal (1): ASoC: hdac_hdmi: use audio component framework to read ELD sound/soc/codecs/hdac_hdmi.c | 919 ++++++++++++++---------- sound/soc/intel/boards/bxt_da7219_max98357a.c | 10 +- sound/soc/intel/boards/bxt_rt298.c | 11 +- sound/soc/intel/boards/skl_nau88l25_max98357a.c | 12 +- sound/soc/intel/boards/skl_nau88l25_ssm4567.c | 13 +- sound/soc/intel/boards/skl_rt286.c | 10 +- 6 files changed, 597 insertions(+), 378 deletions(-) -- 2.5.0

2 22

[alsa-devel] [PATCH v3 00/12] ASoC: hdmi: Preparatory work to support MST audio
by jeeja.kp＠intel.com 08 Feb '17

08 Feb '17

From: Jeeja KP <jeeja.kp(a)intel.com> Display port 1.2 introduces new capability Multi-stream transport (MST) which will allow multiple stream to route to single display port where multiple monitors are connected. Multiple monitors will be connected by a MST Hub or a monitor capable of daisy-chaining. With MST support, a pin can support multiple ports and on each port a monitor can be connected. This is preparatory patch series to enable DP MST Audio by extending the current design from pin to port. o i915 acomp APIs are now used to read the ELD info and support is extended for MST port as well. o Configure port/pin/audio infoframe in widget event handlers for dynamic routing when monitor is connected/disconnected instead of DAI ops. o Use set_tdm slot to set the stream tag instead of dai params and store it in pcm context and use this in configuring the converter in widget event handler. o With MST, pin mux for CVT selection will be used to select CVT for pin-port instead of pin. So create the pin mux accordingly and update the route in skl/bxt machines. o add channel map support in bxtn machines. Note: o This patch series has dependency on the series "ASoC: Intel: Skylake: Driver updates". o This changes require UCM conf modification, once this series is accepted, I will post the UCM change. o This series depends on DRM changes to enable MST and changes are already merged in 4.10-rc1 branch. Changes v2: Split the patchs to smaller series. Changes v3: o rebased on latest branch o Removed already merged patch. Jeeja KP (12): ASoC: hdac_hdmi: Register widget event handlers ASoC: Intel: Skylake: Use set_tdm_slot to set the dma channel ASoC: hdac_hdmi: Move channel info from pin to PCM structure ASoC: Intel: bxt: add channel map support in rt298 machine ASoC: Intel: bxt: add channel map support in bxt_da7219_max98357a machine ASoC: hdac_hdmi: Begin to add support for DP Multi-stream audio ASoC: Intel: Skylake: Add route change to rt286 machine ASoC: Intel: Skylake: Add route change to nau88l25_max98357a machine ASoC: Intel: Skylake: Add route change to nau88l25_ssm4567 machine ASoC: Intel: bxt: Add route change to rt298 machine ASoC: Intel: bxt: Add route change to da7219_max98357a machine ASoC: hdac_hdmi: Add support to handle MST capable pin sound/soc/codecs/hdac_hdmi.c | 798 ++++++++++++++---------- sound/soc/intel/boards/bxt_da7219_max98357a.c | 55 +- sound/soc/intel/boards/bxt_rt298.c | 58 +- sound/soc/intel/boards/skl_nau88l25_max98357a.c | 8 +- sound/soc/intel/boards/skl_nau88l25_ssm4567.c | 9 +- sound/soc/intel/boards/skl_rt286.c | 6 +- sound/soc/intel/skylake/skl-pcm.c | 10 +- 7 files changed, 578 insertions(+), 366 deletions(-) -- 2.5.0

3 17

[alsa-devel] [PATCH v2 0/9] Allwinner H5 and Orange Pi PC2 support
by Icenowy Zheng 08 Feb '17

08 Feb '17

Allwinner H5 is a 64-bit SoC with a design like the 32-bit H3. This patch adds support for it, along with the first available board -- Orange Pi PC2. P.S. Some patches are sent wrongly, please ignore them. Sorry. Andre Przywara (3): arm: dts: sun8i: split Allwinner H3 .dtsi arm64: dts: allwinner: add Allwinner H5 .dtsi arm64: dts: sunxi: add support for the Orange Pi PC 2 board Icenowy Zheng (6): drivers: pinctrl: add driver for Allwinner H5 SoC arm64: allwinner: Kconfig: add essential pinctrl driver for H5 clk: sunxi-ng: add support for Allwinner H5 SoC clk: sunxi-ng: remove transitional headers for dt-bindings dmaengine: sun6i: allow build on ARM64 platforms (sun50i) ASoC: sunxi: allow the analog codec driver to be built on ARM64 .../devicetree/bindings/clock/sunxi-ccu.txt | 1 + .../bindings/pinctrl/allwinner,sunxi-pinctrl.txt | 1 + arch/arm/boot/dts/sun8i-h3.dtsi | 501 +----------------- arch/arm/boot/dts/sunxi-h3-h5.dtsi | 557 ++++++++++++++++++++ arch/arm64/Kconfig.platforms | 5 +- arch/arm64/boot/dts/allwinner/Makefile | 1 + .../boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts | 164 ++++++ arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi | 140 ++++++ arch/arm64/boot/dts/allwinner/sunxi-h3-h5.dtsi | 1 + drivers/clk/sunxi-ng/Kconfig | 6 +- drivers/clk/sunxi-ng/Makefile | 2 +- .../sunxi-ng/{ccu-sun8i-h3.c => ccu-sunxi-h3-h5.c} | 179 ++++++- .../sunxi-ng/{ccu-sun8i-h3.h => ccu-sunxi-h3-h5.h} | 15 +- drivers/dma/Kconfig | 2 +- drivers/pinctrl/sunxi/Kconfig | 4 + drivers/pinctrl/sunxi/Makefile | 1 + drivers/pinctrl/sunxi/pinctrl-sun50i-h5.c | 558 +++++++++++++++++++++ .../clock/{sun8i-h3-ccu.h => sunxi-h3-h5-ccu.h} | 11 +- .../reset/{sun8i-h3-ccu.h => sunxi-h3-h5-ccu.h} | 11 +- sound/soc/sunxi/Kconfig | 2 +- 20 files changed, 1628 insertions(+), 534 deletions(-) create mode 100644 arch/arm/boot/dts/sunxi-h3-h5.dtsi create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi create mode 120000 arch/arm64/boot/dts/allwinner/sunxi-h3-h5.dtsi rename drivers/clk/sunxi-ng/{ccu-sun8i-h3.c => ccu-sunxi-h3-h5.c} (80%) rename drivers/clk/sunxi-ng/{ccu-sun8i-h3.h => ccu-sunxi-h3-h5.h} (82%) create mode 100644 drivers/pinctrl/sunxi/pinctrl-sun50i-h5.c rename include/dt-bindings/clock/{sun8i-h3-ccu.h => sunxi-h3-h5-ccu.h} (95%) rename include/dt-bindings/reset/{sun8i-h3-ccu.h => sunxi-h3-h5-ccu.h} (94%) -- 2.11.0

5 19

Re: [alsa-devel] [linux-sunxi] Re: [PATCH v3 04/10] clk: sunxi-ng: add support for Allwinner H5 SoC
by Icenowy Zheng 07 Feb '17

07 Feb '17

2017年1月30日 17:04于 Maxime Ripard <maxime.ripard(a)free-electrons.com>写道： > > On Sun, Jan 29, 2017 at 10:33:25AM +0800, Icenowy Zheng wrote: > > Allwinner H5 is a SoC that features a CCU like H3, but with MMC phase > > clocks removed (for new MMC controller) and a new bus gate/reset > > imported. > > > > Add support for it. > > > > Signed-off-by: Icenowy Zheng <icenowy(a)aosc.xyz> > > --- > > See the comments of the previous patch. > > > > .../devicetree/bindings/clock/sunxi-ccu.txt | 1 + > > drivers/clk/sunxi-ng/Kconfig | 2 +- > > drivers/clk/sunxi-ng/ccu-sunxi-h3-h5.c | 137 +++++++++++++++++++++ > > drivers/clk/sunxi-ng/ccu-sunxi-h3-h5.h | 5 +- > > include/dt-bindings/clock/sunxi-h3-h5-ccu.h | 3 + > > include/dt-bindings/reset/sunxi-h3-h5-ccu.h | 3 + > > 6 files changed, 149 insertions(+), 2 deletions(-) > > > > diff --git a/Documentation/devicetree/bindings/clock/sunxi-ccu.txt b/Documentation/devicetree/bindings/clock/sunxi-ccu.txt > > index f6032cf63f12..a33a4a5ecffa 100644 > > --- a/Documentation/devicetree/bindings/clock/sunxi-ccu.txt > > +++ b/Documentation/devicetree/bindings/clock/sunxi-ccu.txt > > @@ -9,6 +9,7 @@ Required properties : > > - "allwinner,sun8i-h3-ccu" > > - "allwinner,sun8i-v3s-ccu" > > - "allwinner,sun50i-a64-ccu" > > + - "allwinner,sun50i-h5-ccu" > > > > - reg: Must contain the registers base address and length > > - clocks: phandle to the oscillators feeding the CCU. Two are needed: > > diff --git a/drivers/clk/sunxi-ng/Kconfig b/drivers/clk/sunxi-ng/Kconfig > > index 4be083ae717f..bdf18e846731 100644 > > --- a/drivers/clk/sunxi-ng/Kconfig > > +++ b/drivers/clk/sunxi-ng/Kconfig > > @@ -117,7 +117,7 @@ config SUNXI_H3_H5_CCU > > select SUNXI_CCU_NM > > select SUNXI_CCU_MP > > select SUNXI_CCU_PHASE > > - default MACH_SUN8I > > + default MACH_SUN8I || (ARM64 && ARCH_SUNXI) > > > > config SUN8I_V3S_CCU > > bool "Support for the Allwinner V3s CCU" > > diff --git a/drivers/clk/sunxi-ng/ccu-sunxi-h3-h5.c b/drivers/clk/sunxi-ng/ccu-sunxi-h3-h5.c > > index be63b56315f5..b7b9f85f5c9f 100644 > > --- a/drivers/clk/sunxi-ng/ccu-sunxi-h3-h5.c > > +++ b/drivers/clk/sunxi-ng/ccu-sunxi-h3-h5.c > > @@ -302,6 +302,8 @@ static SUNXI_CCU_GATE(bus_uart3_clk, "bus-uart3", "apb2", > > 0x06c, BIT(19), 0); > > static SUNXI_CCU_GATE(bus_scr0_clk, "bus-scr0", "apb2", > > 0x06c, BIT(20), 0); > > +static SUNXI_CCU_GATE(bus_scr1_clk, "bus-scr1", "apb2", > > + 0x06c, BIT(21), 0); > > > > static SUNXI_CCU_GATE(bus_ephy_clk, "bus-ephy", "ahb1", > > 0x070, BIT(0), 0); > > @@ -547,6 +549,7 @@ static struct ccu_common *sunxi_h3_h5_ccu_clks[] = { > > &bus_uart2_clk.common, > > &bus_uart3_clk.common, > > &bus_scr0_clk.common, > > + &bus_scr1_clk.common, > > &bus_ephy_clk.common, > > &bus_dbg_clk.common, > > &ths_clk.common, > > @@ -730,6 +733,122 @@ static struct clk_hw_onecell_data sun8i_h3_hw_clks = { > > .num = CLK_NUMBER, > > }; > > > > +static struct clk_hw_onecell_data sun50i_h5_hw_clks = { > > + .hws = { > > + [CLK_PLL_CPUX] = &pll_cpux_clk.common.hw, > > + [CLK_PLL_AUDIO_BASE] = &pll_audio_base_clk.common.hw, > > + [CLK_PLL_AUDIO] = &pll_audio_clk.hw, > > + [CLK_PLL_AUDIO_2X] = &pll_audio_2x_clk.hw, > > + [CLK_PLL_AUDIO_4X] = &pll_audio_4x_clk.hw, > > + [CLK_PLL_AUDIO_8X] = &pll_audio_8x_clk.hw, > > + [CLK_PLL_VIDEO] = &pll_video_clk.common.hw, > > + [CLK_PLL_VE] = &pll_ve_clk.common.hw, > > + [CLK_PLL_DDR] = &pll_ddr_clk.common.hw, > > + [CLK_PLL_PERIPH0] = &pll_periph0_clk.common.hw, > > + [CLK_PLL_PERIPH0_2X] = &pll_periph0_2x_clk.hw, > > + [CLK_PLL_GPU] = &pll_gpu_clk.common.hw, > > + [CLK_PLL_PERIPH1] = &pll_periph1_clk.common.hw, > > + [CLK_PLL_DE] = &pll_de_clk.common.hw, > > + [CLK_CPUX] = &cpux_clk.common.hw, > > + [CLK_AXI] = &axi_clk.common.hw, > > + [CLK_AHB1] = &ahb1_clk.common.hw, > > + [CLK_APB1] = &apb1_clk.common.hw, > > + [CLK_APB2] = &apb2_clk.common.hw, > > + [CLK_AHB2] = &ahb2_clk.common.hw, > > + [CLK_BUS_CE] = &bus_ce_clk.common.hw, > > + [CLK_BUS_DMA] = &bus_dma_clk.common.hw, > > + [CLK_BUS_MMC0] = &bus_mmc0_clk.common.hw, > > + [CLK_BUS_MMC1] = &bus_mmc1_clk.common.hw, > > + [CLK_BUS_MMC2] = &bus_mmc2_clk.common.hw, > > + [CLK_BUS_NAND] = &bus_nand_clk.common.hw, > > + [CLK_BUS_DRAM] = &bus_dram_clk.common.hw, > > + [CLK_BUS_EMAC] = &bus_emac_clk.common.hw, > > + [CLK_BUS_TS] = &bus_ts_clk.common.hw, > > + [CLK_BUS_HSTIMER] = &bus_hstimer_clk.common.hw, > > + [CLK_BUS_SPI0] = &bus_spi0_clk.common.hw, > > + [CLK_BUS_SPI1] = &bus_spi1_clk.common.hw, > > + [CLK_BUS_OTG] = &bus_otg_clk.common.hw, > > + [CLK_BUS_EHCI0] = &bus_ehci0_clk.common.hw, > > + [CLK_BUS_EHCI1] = &bus_ehci1_clk.common.hw, > > + [CLK_BUS_EHCI2] = &bus_ehci2_clk.common.hw, > > + [CLK_BUS_EHCI3] = &bus_ehci3_clk.common.hw, > > + [CLK_BUS_OHCI0] = &bus_ohci0_clk.common.hw, > > + [CLK_BUS_OHCI1] = &bus_ohci1_clk.common.hw, > > + [CLK_BUS_OHCI2] = &bus_ohci2_clk.common.hw, > > + [CLK_BUS_OHCI3] = &bus_ohci3_clk.common.hw, > > + [CLK_BUS_VE] = &bus_ve_clk.common.hw, > > + [CLK_BUS_TCON0] = &bus_tcon0_clk.common.hw, > > + [CLK_BUS_TCON1] = &bus_tcon1_clk.common.hw, > > + [CLK_BUS_DEINTERLACE] = &bus_deinterlace_clk.common.hw, > > + [CLK_BUS_CSI] = &bus_csi_clk.common.hw, > > + [CLK_BUS_TVE] = &bus_tve_clk.common.hw, > > + [CLK_BUS_HDMI] = &bus_hdmi_clk.common.hw, > > + [CLK_BUS_DE] = &bus_de_clk.common.hw, > > + [CLK_BUS_GPU] = &bus_gpu_clk.common.hw, > > + [CLK_BUS_MSGBOX] = &bus_msgbox_clk.common.hw, > > + [CLK_BUS_SPINLOCK] = &bus_spinlock_clk.common.hw, > > + [CLK_BUS_CODEC] = &bus_codec_clk.common.hw, > > + [CLK_BUS_SPDIF] = &bus_spdif_clk.common.hw, > > + [CLK_BUS_PIO] = &bus_pio_clk.common.hw, > > + [CLK_BUS_THS] = &bus_ths_clk.common.hw, > > + [CLK_BUS_I2S0] = &bus_i2s0_clk.common.hw, > > + [CLK_BUS_I2S1] = &bus_i2s1_clk.common.hw, > > + [CLK_BUS_I2S2] = &bus_i2s2_clk.common.hw, > > + [CLK_BUS_I2C0] = &bus_i2c0_clk.common.hw, > > + [CLK_BUS_I2C1] = &bus_i2c1_clk.common.hw, > > + [CLK_BUS_I2C2] = &bus_i2c2_clk.common.hw, > > + [CLK_BUS_UART0] = &bus_uart0_clk.common.hw, > > + [CLK_BUS_UART1] = &bus_uart1_clk.common.hw, > > + [CLK_BUS_UART2] = &bus_uart2_clk.common.hw, > > + [CLK_BUS_UART3] = &bus_uart3_clk.common.hw, > > + [CLK_BUS_SCR0] = &bus_scr0_clk.common.hw, > > + [CLK_BUS_SCR1] = &bus_scr1_clk.common.hw, > > + [CLK_BUS_EPHY] = &bus_ephy_clk.common.hw, > > + [CLK_BUS_DBG] = &bus_dbg_clk.common.hw, > > + [CLK_THS] = &ths_clk.common.hw, > > + [CLK_NAND] = &nand_clk.common.hw, > > + [CLK_MMC0] = &mmc0_clk.common.hw, > > + [CLK_MMC1] = &mmc1_clk.common.hw, > > + [CLK_MMC2] = &mmc2_clk.common.hw, > > + [CLK_TS] = &ts_clk.common.hw, > > + [CLK_CE] = &ce_clk.common.hw, > > + [CLK_SPI0] = &spi0_clk.common.hw, > > + [CLK_SPI1] = &spi1_clk.common.hw, > > + [CLK_I2S0] = &i2s0_clk.common.hw, > > + [CLK_I2S1] = &i2s1_clk.common.hw, > > + [CLK_I2S2] = &i2s2_clk.common.hw, > > + [CLK_SPDIF] = &spdif_clk.common.hw, > > + [CLK_USB_PHY0] = &usb_phy0_clk.common.hw, > > + [CLK_USB_PHY1] = &usb_phy1_clk.common.hw, > > + [CLK_USB_PHY2] = &usb_phy2_clk.common.hw, > > + [CLK_USB_PHY3] = &usb_phy3_clk.common.hw, > > + [CLK_USB_OHCI0] = &usb_ohci0_clk.common.hw, > > + [CLK_USB_OHCI1] = &usb_ohci1_clk.common.hw, > > + [CLK_USB_OHCI2] = &usb_ohci2_clk.common.hw, > > + [CLK_USB_OHCI3] = &usb_ohci3_clk.common.hw, > > + [CLK_DRAM] = &dram_clk.common.hw, > > + [CLK_DRAM_VE] = &dram_ve_clk.common.hw, > > + [CLK_DRAM_CSI] = &dram_csi_clk.common.hw, > > + [CLK_DRAM_DEINTERLACE] = &dram_deinterlace_clk.common.hw, > > + [CLK_DRAM_TS] = &dram_ts_clk.common.hw, > > + [CLK_DE] = &de_clk.common.hw, > > + [CLK_TCON0] = &tcon_clk.common.hw, > > + [CLK_TVE] = &tve_clk.common.hw, > > + [CLK_DEINTERLACE] = &deinterlace_clk.common.hw, > > + [CLK_CSI_MISC] = &csi_misc_clk.common.hw, > > + [CLK_CSI_SCLK] = &csi_sclk_clk.common.hw, > > + [CLK_CSI_MCLK] = &csi_mclk_clk.common.hw, > > + [CLK_VE] = &ve_clk.common.hw, > > + [CLK_AC_DIG] = &ac_dig_clk.common.hw, > > + [CLK_AVS] = &avs_clk.common.hw, > > + [CLK_HDMI] = &hdmi_clk.common.hw, > > + [CLK_HDMI_DDC] = &hdmi_ddc_clk.common.hw, > > + [CLK_MBUS] = &mbus_clk.common.hw, > > + [CLK_GPU] = &gpu_clk.common.hw, > > + }, > > + .num = CLK_NUMBER, > > +}; > > + > > static struct ccu_reset_map sunxi_h3_h5_ccu_resets[] = { > > [RST_USB_PHY0] = { 0x0cc, BIT(0) }, > > [RST_USB_PHY1] = { 0x0cc, BIT(1) }, > > @@ -791,6 +910,7 @@ static struct ccu_reset_map sunxi_h3_h5_ccu_resets[] = { > > [RST_BUS_UART2] = { 0x2d8, BIT(18) }, > > [RST_BUS_UART3] = { 0x2d8, BIT(19) }, > > [RST_BUS_SCR0] = { 0x2d8, BIT(20) }, > > + [RST_BUS_SCR1] = { 0x2d8, BIT(21) }, > > That reset line is not valid on the H3. So I should split a H3 reset array and a H5 one? (I modelled after ccu-sun5i.c, which shares one reset array) > > Thanks, > Maxime > > -- > Maxime Ripard, Free Electrons > Embedded Linux and Kernel engineering > http://free-electrons.com > > -- > You received this message because you are subscribed to the Google Groups "linux-sunxi" group. > To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscribe(a)googlegroups.com. > For more options, visit https://groups.google.com/d/optout.

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[alsa-devel] sound: unable to handle kernel paging request snd_seq_prioq_cell_out
by Dmitry Vyukov 06 Feb '17

06 Feb '17

Hello, The following program triggers wild memory access in snd_seq_prioq_cell_out: https://gist.githubusercontent.com/dvyukov/e0bfb47caf577217b3b0550866cba00b… BUG: unable to handle kernel paging request at ffffc9000392ddb8 IP: snd_seq_prioq_cell_out+0x11d/0x260 sound/core/seq/seq_prioq.c:231 PGD 6cc6f067 PUD 6cc70067 PMD 5f94c067 PTE 0 Oops: 0000 [#1] SMP KASAN Modules linked in: CPU: 2 PID: 375 Comm: syz-executor Not tainted 4.10.0-rc5+ #201 Hardware name: QEMU Standard PC (i440FX + PIIX, 1996), BIOS Bochs 01/01/2011 task: ffff880066f92500 task.stack: ffff88005f740000 RIP: 0010:snd_seq_prioq_cell_out+0x11d/0x260 sound/core/seq/seq_prioq.c:231 RSP: 0018:ffff88005f7470b8 EFLAGS: 00010046 RAX: dffffc0000000000 RBX: 1ffff1000bee8e18 RCX: ffffc90000c22000 RDX: 1ffff92000725bb7 RSI: ffffffff8348787e RDI: ffffc9000392ddb8 RBP: ffff88005f747208 R08: 0000000000000001 R09: 0000000000000001 R10: dffffc0000000000 R11: 0000000000000004 R12: ffff8800673cbe80 R13: ffff88005f7471e0 R14: ffffc9000392dd90 R15: ffff8800673cbe98 FS: 00007f5262fee700(0000) GS:ffff88006d100000(0000) knlGS:0000000000000000 CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033 CR2: ffffc9000392ddb8 CR3: 0000000066209000 CR4: 00000000001406e0 Call Trace: snd_seq_prioq_delete+0x8b/0xf0 sound/core/seq/seq_prioq.c:90 queue_delete+0x77/0xb0 sound/core/seq/seq_queue.c:152 snd_seq_queue_client_leave+0x34/0x130 sound/core/seq/seq_queue.c:595 seq_free_client1.part.5+0x10a/0x410 sound/core/seq/seq_clientmgr.c:258 seq_free_client1 sound/core/seq/seq_clientmgr.c:255 [inline] seq_free_client+0x6f/0x170 sound/core/seq/seq_clientmgr.c:284 snd_seq_release+0x51/0xe0 sound/core/seq/seq_clientmgr.c:366 __fput+0x332/0x7f0 fs/file_table.c:208 ____fput+0x15/0x20 fs/file_table.c:244 task_work_run+0x18a/0x260 kernel/task_work.c:116 get_signal+0x148f/0x1820 kernel/signal.c:2143 do_signal+0xd2/0x2190 arch/x86/kernel/signal.c:807 exit_to_usermode_loop+0x200/0x2a0 arch/x86/entry/common.c:156 prepare_exit_to_usermode arch/x86/entry/common.c:190 [inline] syscall_return_slowpath+0x4d3/0x570 arch/x86/entry/common.c:259 entry_SYSCALL_64_fastpath+0xc0/0xc2 RIP: 0033:0x4457d9 RSP: 002b:00007f5262fedb58 EFLAGS: 00000286 ORIG_RAX: 0000000000000010 RAX: 0000000000000000 RBX: 00000000007080a8 RCX: 00000000004457d9 RDX: 0000000020001000 RSI: 000000004058534c RDI: 0000000000000005 RBP: 0000000000002250 R08: 0000000000000000 R09: 0000000000000000 R10: 0000000000000000 R11: 0000000000000286 R12: 00000000006e0310 R13: 0000000000000005 R14: 000000004058534c R15: 0000000020001000 Code: f6 0f 84 90 00 00 00 e8 02 1e 2a fe 49 8d 7e 28 48 b8 00 00 00 00 00 fc ff df 48 89 fa 48 c1 ea 03 80 3c 02 00 0f 85 1f 01 00 00 <49> 8b 46 28 49 8d 7c 24 08 48 89 fa 49 89 04 24 48 c1 ea 03 48 RIP: snd_seq_prioq_cell_out+0x11d/0x260 sound/core/seq/seq_prioq.c:231 RSP: ffff88005f7470b8 CR2: ffffc9000392ddb8 ---[ end trace cbaec69c4a9fdbfc ]--- On commit fd694aaa46c7ed811b72eb47d5eb11ce7ab3f7f1 (Jan 26).

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[alsa-devel] [PATCH] ASoC: Intel: Skylake: Report Platform ID info from NHLT
by Subhransu S. Prusty 06 Feb '17

06 Feb '17

This patch create entry in sysfs file system to report the platform_id = "pci-id-oem_id-oem_table_id-oem_revision" for board identification. Signed-off-by: Subhransu S. Prusty <subhransu.s.prusty(a)intel.com> Signed-off-by: Sodhi, VunnyX <vunnyx.sodhi(a)intel.com> --- sound/soc/intel/skylake/skl-nhlt.c | 42 +++++++++++++++++++++++++++++++++++--- sound/soc/intel/skylake/skl.c | 5 +++++ sound/soc/intel/skylake/skl.h | 2 ++ 3 files changed, 46 insertions(+), 3 deletions(-) diff --git a/sound/soc/intel/skylake/skl-nhlt.c b/sound/soc/intel/skylake/skl-nhlt.c index 3f8e6f0b7eb5..2710a3704a38 100644 --- a/sound/soc/intel/skylake/skl-nhlt.c +++ b/sound/soc/intel/skylake/skl-nhlt.c @@ -189,9 +189,9 @@ int skl_get_dmic_geo(struct skl *skl) return dmic_geo; } -static void skl_nhlt_trim_space(struct skl *skl) +static void skl_nhlt_trim_space(char *trim) { - char *s = skl->tplg_name; + char *s = trim; int cnt; int i; @@ -218,7 +218,43 @@ int skl_nhlt_update_topology_bin(struct skl *skl) skl->pci_id, nhlt->header.oem_id, nhlt->header.oem_table_id, nhlt->header.oem_revision, "-tplg.bin"); - skl_nhlt_trim_space(skl); + skl_nhlt_trim_space(skl->tplg_name); return 0; } + +static ssize_t skl_nhlt_platform_id_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + struct pci_dev *pci = to_pci_dev(dev); + struct hdac_ext_bus *ebus = pci_get_drvdata(pci); + struct skl *skl = ebus_to_skl(ebus); + struct nhlt_acpi_table *nhlt = (struct nhlt_acpi_table *)skl->nhlt; + char platform_id[32]; + + sprintf(platform_id, "%x-%.6s-%.8s-%d", skl->pci_id, + nhlt->header.oem_id, nhlt->header.oem_table_id, + nhlt->header.oem_revision); + + skl_nhlt_trim_space(platform_id); + return sprintf(buf, "%s\n", platform_id); +} + +static DEVICE_ATTR(platform_id, 0444, skl_nhlt_platform_id_show, NULL); + +int skl_nhlt_create_sysfs(struct skl *skl) +{ + struct device *dev = &skl->pci->dev; + + if (sysfs_create_file(&dev->kobj, &dev_attr_platform_id.attr)) + dev_warn(dev, "Error creating sysfs entry\n"); + + return 0; +} + +void skl_nhlt_remove_sysfs(struct skl *skl) +{ + struct device *dev = &skl->pci->dev; + + sysfs_remove_file(&dev->kobj, &dev_attr_platform_id.attr); +} diff --git a/sound/soc/intel/skylake/skl.c b/sound/soc/intel/skylake/skl.c index da5db5098274..1152e46daede 100644 --- a/sound/soc/intel/skylake/skl.c +++ b/sound/soc/intel/skylake/skl.c @@ -732,6 +732,10 @@ static int skl_probe(struct pci_dev *pci, goto out_display_power_off; } + err = skl_nhlt_create_sysfs(skl); + if (err < 0) + goto out_nhlt_free; + skl_nhlt_update_topology_bin(skl); pci_set_drvdata(skl->pci, ebus); @@ -852,6 +856,7 @@ static void skl_remove(struct pci_dev *pci) skl_free_dsp(skl); skl_machine_device_unregister(skl); skl_dmic_device_unregister(skl); + skl_nhlt_remove_sysfs(skl); skl_nhlt_free(skl->nhlt); skl_free(ebus); dev_set_drvdata(&pci->dev, NULL); diff --git a/sound/soc/intel/skylake/skl.h b/sound/soc/intel/skylake/skl.h index 4986e3929dd3..0a1b02e21277 100644 --- a/sound/soc/intel/skylake/skl.h +++ b/sound/soc/intel/skylake/skl.h @@ -130,5 +130,7 @@ struct nhlt_specific_cfg *skl_get_ep_blob(struct skl *skl, u32 instance, void skl_cleanup_resources(struct skl *skl); const struct skl_dsp_ops *skl_get_dsp_ops(int pci_id); void skl_update_d0i3c(struct device *dev, bool enable); +int skl_nhlt_create_sysfs(struct skl *skl); +void skl_nhlt_remove_sysfs(struct skl *skl); #endif /* __SOUND_SOC_SKL_H */ -- 1.9.1

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[alsa-devel] [PATCH v3 00/10] Allwinner H5 and Orange Pi PC2 support
by Icenowy Zheng 05 Feb '17

05 Feb '17

Allwinner H5 is a 64-bit SoC with a design like the 32-bit H3. This patchset adds support for it, along with the first available board -- Orange Pi PC2. Some drivers are also enabled to be built on ARM64 ARCH_SUNXI platform, in order to make the internal audio codec work. Andre Przywara (3): arm: dts: sun8i: split Allwinner H3 .dtsi arm64: dts: allwinner: add Allwinner H5 .dtsi arm64: dts: sunxi: add support for the Orange Pi PC 2 board Icenowy Zheng (7): drivers: pinctrl: add driver for Allwinner H5 SoC arm64: allwinner: Kconfig: add essential pinctrl driver for H5 clk: sunxi-ng: rename sun8i-h3 driver to sunxi-h3-h5 clk: sunxi-ng: add support for Allwinner H5 SoC clk: sunxi-ng: remove transitional headers for dt-bindings dmaengine: sun6i: allow build on ARM64 platforms (sun50i) ASoC: sunxi: allow the analog codec driver to be built on ARM64 .../devicetree/bindings/clock/sunxi-ccu.txt | 1 + .../bindings/pinctrl/allwinner,sunxi-pinctrl.txt | 1 + arch/arm/boot/dts/sun8i-h3.dtsi | 571 ++------------------- arch/arm/boot/dts/sunxi-h3-h5.dtsi | 557 ++++++++++++++++++++ arch/arm64/Kconfig.platforms | 5 +- arch/arm64/boot/dts/allwinner/Makefile | 1 + .../boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts | 164 ++++++ arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi | 139 +++++ arch/arm64/boot/dts/allwinner/sunxi-h3-h5.dtsi | 1 + drivers/clk/sunxi-ng/Kconfig | 6 +- drivers/clk/sunxi-ng/Makefile | 2 +- .../sunxi-ng/{ccu-sun8i-h3.c => ccu-sunxi-h3-h5.c} | 179 ++++++- .../sunxi-ng/{ccu-sun8i-h3.h => ccu-sunxi-h3-h5.h} | 15 +- drivers/dma/Kconfig | 2 +- drivers/pinctrl/sunxi/Kconfig | 4 + drivers/pinctrl/sunxi/Makefile | 1 + drivers/pinctrl/sunxi/pinctrl-sun50i-h5.c | 558 ++++++++++++++++++++ .../clock/{sun8i-h3-ccu.h => sunxi-h3-h5-ccu.h} | 11 +- .../reset/{sun8i-h3-ccu.h => sunxi-h3-h5-ccu.h} | 11 +- sound/soc/sunxi/Kconfig | 2 +- 20 files changed, 1662 insertions(+), 569 deletions(-) create mode 100644 arch/arm/boot/dts/sunxi-h3-h5.dtsi create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi create mode 120000 arch/arm64/boot/dts/allwinner/sunxi-h3-h5.dtsi rename drivers/clk/sunxi-ng/{ccu-sun8i-h3.c => ccu-sunxi-h3-h5.c} (80%) rename drivers/clk/sunxi-ng/{ccu-sun8i-h3.h => ccu-sunxi-h3-h5.h} (82%) create mode 100644 drivers/pinctrl/sunxi/pinctrl-sun50i-h5.c rename include/dt-bindings/clock/{sun8i-h3-ccu.h => sunxi-h3-h5-ccu.h} (95%) rename include/dt-bindings/reset/{sun8i-h3-ccu.h => sunxi-h3-h5-ccu.h} (94%) -- 2.11.0

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[alsa-devel] [PATCH v5 0/4] Add support for es8388 and hdmi audio on the rock2
by Romain Perier 04 Feb '17

04 Feb '17

This set of patches adds a machine driver for rk3288-based boards that have the built-in HDMI audio and a generic analog output. It also adds slave mode to the es8328 driver that currently only supported the master mode. Then, it adds the required DT definitions to link rockchip-i2s to the es8388 analog output and to hdmi audio. This work is based on the initial work that was done by Sjoerd Simons <sjoerd.simons(a)collabora.co.uk> with some improvements, changes and more commits. Changes in v5: - Fixed coding style issue in patch 2/4 (the switch case). - Moved the code for the master mode and the slave mode into the switch case for patch 2/4 - Fixed error handling for patch 3/4 Changes in v4: - Add support for multi codecs in the asoc machine driver, so the driver matches the hw architecture (analog and hdmi audio are connected on the same i2s line) - Renamed the driver to rk3288-hdmi-analog.c and changed its documentation - Add built-in support for hdmi audio in this driver - Add support for the property 'rockchip,routing' Changes in v3: - Cosmetic changes in rockchip_es8388.c - Added missing email to MODULE_AUTHOR in rockchip_es8388.c Changes in v2: - Fixed wrong use of the data structure i2c_device_id - Fixed wrong dependencies for SND_SOC_ROCKCHIP_ES8388 Romain Perier (4): ASoC: es8328-i2c: Add compatible for ES8388 ASoC: es8328: Add support for slave mode ASoC: rockchip: Add machine driver for RK3288 boards that use analog/HDMI arm: dts: Add support for ES8388 to the Radxa Rock 2 Documentation/devicetree/bindings/sound/es8328.txt | 2 +- .../bindings/sound/rockchip,rk3288-hdmi-analog.txt | 36 +++ arch/arm/boot/dts/rk3288-rock2-square.dts | 39 +++ sound/soc/codecs/es8328-i2c.c | 2 + sound/soc/codecs/es8328.c | 20 +- sound/soc/rockchip/Kconfig | 10 + sound/soc/rockchip/Makefile | 2 + sound/soc/rockchip/rk3288_hdmi_analog.c | 299 +++++++++++++++++++++ 8 files changed, 403 insertions(+), 7 deletions(-) create mode 100644 Documentation/devicetree/bindings/sound/rockchip,rk3288-hdmi-analog.txt create mode 100644 sound/soc/rockchip/rk3288_hdmi_analog.c -- 2.9.3

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