August 2015 - Alsa-devel - mailman.alsa-project.org

[alsa-devel] [PATCH] topology: Add support for writing manifest private data.
by Liam Girdwood 05 Aug '15

05 Aug '15

From: Mengdong Lin <mengdong.lin(a)intel.com> Allow manifest to contain private data and write this data to file. Signed-off-by: Mengdong Lin <mengdong.lin(a)intel.com> Signed-off-by: Liam Girdwood <liam.r.girdwood(a)linux.intel.com> --- src/topology/builder.c | 37 ++++++++++++++++++++++++++++++++----- src/topology/tplg_local.h | 1 + 2 files changed, 33 insertions(+), 5 deletions(-) diff --git a/src/topology/builder.c b/src/topology/builder.c index 0066b22..a944866 100644 --- a/src/topology/builder.c +++ b/src/topology/builder.c @@ -226,9 +226,6 @@ static int write_block(snd_tplg_t *tplg, struct list_head *base, case OBJECT_TYPE_CC: return write_elem_block(tplg, base, size, SND_SOC_TPLG_TYPE_DAI_LINK, "cc"); - case OBJECT_TYPE_MANIFEST: - return write_data_block(tplg, size, SND_SOC_TPLG_TYPE_MANIFEST, - "manifest", &tplg->manifest); case OBJECT_TYPE_DATA: return write_elem_block(tplg, base, size, SND_SOC_TPLG_TYPE_PDATA, "data"); @@ -239,13 +236,43 @@ static int write_block(snd_tplg_t *tplg, struct list_head *base, return 0; } +/* write the manifest including its private data */ +static int write_manifest_data(snd_tplg_t *tplg) +{ + int ret; + + /* write the header for this block */ + ret = write_block_header(tplg, SND_SOC_TPLG_TYPE_MANIFEST, 0, + SND_SOC_TPLG_ABI_VERSION, 0, + sizeof(tplg->manifest) + tplg->manifest.priv.size, 1); + if (ret < 0) { + SNDERR("error: failed to write manifest block %d\n", ret); + return ret; + } + + verbose(tplg, "manifest : write %d bytes\n", sizeof(tplg->manifest)); + ret = write(tplg->out_fd, &tplg->manifest, sizeof(tplg->manifest)); + if (ret < 0) { + SNDERR("error: failed to write manifest %d\n", ret); + return ret; + } + + verbose(tplg, "manifest : write %d priv bytes\n", tplg->manifest.priv.size); + ret = write(tplg->out_fd, tplg->manifest_pdata, tplg->manifest.priv.size); + if (ret < 0) { + SNDERR("error: failed to write manifest priv data %d\n", ret); + return ret; + } + + return 0; +} + int tplg_write_data(snd_tplg_t *tplg) { int ret; /* write manifest */ - ret = write_data_block(tplg, sizeof(tplg->manifest), - OBJECT_TYPE_MANIFEST, "manifest", &tplg->manifest); + ret = write_manifest_data(tplg); if (ret < 0) { SNDERR("failed to write manifest %d\n", ret); return ret; diff --git a/src/topology/tplg_local.h b/src/topology/tplg_local.h index 62788e4..ad38945 100644 --- a/src/topology/tplg_local.h +++ b/src/topology/tplg_local.h @@ -77,6 +77,7 @@ struct snd_tplg { /* manifest */ struct snd_soc_tplg_manifest manifest; + const void *manifest_pdata; /* copied by builder at file write */ /* list of each element type */ struct list_head tlv_list; -- 2.1.4

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[alsa-devel] [PATCH] topology: Add element ID so we can look up references by name.
by Liam Girdwood 05 Aug '15

05 Aug '15

From: Jin Yao <yao.jin(a)linux.intel.com> Add support to lookup elements by name. This is in preparation for adding some new API calls that will allow building topology data using a C API. This will allow applications to build thier own topology data directly. Signed-off-by: Jin Yao <yao.jin(a)linux.intel.com> Signed-off-by: Mengdong Lin <mengdong.lin(a)intel.com> --- src/topology/ctl.c | 9 ++++----- src/topology/dapm.c | 2 +- src/topology/data.c | 2 +- src/topology/elem.c | 15 +++++++++++---- src/topology/pcm.c | 10 +++++----- src/topology/text.c | 2 +- src/topology/tplg_local.h | 2 +- 7 files changed, 24 insertions(+), 18 deletions(-) diff --git a/src/topology/ctl.c b/src/topology/ctl.c index 9c1333c..aa06ff6 100644 --- a/src/topology/ctl.c +++ b/src/topology/ctl.c @@ -264,7 +264,7 @@ int tplg_parse_tlv(snd_tplg_t *tplg, snd_config_t *cfg, int err = 0; struct tplg_elem *elem; - elem = tplg_elem_new_common(tplg, cfg, OBJECT_TYPE_TLV); + elem = tplg_elem_new_common(tplg, cfg, NULL, OBJECT_TYPE_TLV); if (!elem) return -ENOMEM; @@ -298,7 +298,7 @@ int tplg_parse_control_bytes(snd_tplg_t *tplg, const char *id, *val = NULL; int err; - elem = tplg_elem_new_common(tplg, cfg, OBJECT_TYPE_BYTES); + elem = tplg_elem_new_common(tplg, cfg, NULL, OBJECT_TYPE_BYTES); if (!elem) return -ENOMEM; @@ -403,11 +403,10 @@ int tplg_parse_control_enum(snd_tplg_t *tplg, snd_config_t *cfg, const char *id, *val = NULL; int err, j; - elem = tplg_elem_new_common(tplg, cfg, OBJECT_TYPE_ENUM); + elem = tplg_elem_new_common(tplg, cfg, NULL, OBJECT_TYPE_ENUM); if (!elem) return -ENOMEM; - /* init new mixer */ ec = elem->enum_ctrl; elem_copy_text(ec->hdr.name, elem->id, SNDRV_CTL_ELEM_ID_NAME_MAXLEN); ec->hdr.type = SND_SOC_TPLG_TYPE_ENUM; @@ -501,7 +500,7 @@ int tplg_parse_control_mixer(snd_tplg_t *tplg, const char *id, *val = NULL; int err, j; - elem = tplg_elem_new_common(tplg, cfg, OBJECT_TYPE_MIXER); + elem = tplg_elem_new_common(tplg, cfg, NULL, OBJECT_TYPE_MIXER); if (!elem) return -ENOMEM; diff --git a/src/topology/dapm.c b/src/topology/dapm.c index 1da82ad..7e26ea0 100644 --- a/src/topology/dapm.c +++ b/src/topology/dapm.c @@ -420,7 +420,7 @@ int tplg_parse_dapm_widget(snd_tplg_t *tplg, const char *id, *val = NULL; int widget_type, err; - elem = tplg_elem_new_common(tplg, cfg, OBJECT_TYPE_DAPM_WIDGET); + elem = tplg_elem_new_common(tplg, cfg, NULL, OBJECT_TYPE_DAPM_WIDGET); if (!elem) return -ENOMEM; diff --git a/src/topology/data.c b/src/topology/data.c index 13e1e2b..c768bc5 100644 --- a/src/topology/data.c +++ b/src/topology/data.c @@ -268,7 +268,7 @@ int tplg_parse_data(snd_tplg_t *tplg, snd_config_t *cfg, int err = 0; struct tplg_elem *elem; - elem = tplg_elem_new_common(tplg, cfg, OBJECT_TYPE_DATA); + elem = tplg_elem_new_common(tplg, cfg, NULL, OBJECT_TYPE_DATA); if (!elem) return -ENOMEM; diff --git a/src/topology/elem.c b/src/topology/elem.c index d7a1fd7..7fee653 100644 --- a/src/topology/elem.c +++ b/src/topology/elem.c @@ -103,20 +103,27 @@ struct tplg_elem *tplg_elem_lookup(struct list_head *base, const char* id, /* create a new common element and object */ struct tplg_elem* tplg_elem_new_common(snd_tplg_t *tplg, - snd_config_t *cfg, enum object_type type) + snd_config_t *cfg, const char *name, enum object_type type) { struct tplg_elem *elem; const char *id; int obj_size = 0; void *obj; + if (!cfg && !name) + return NULL; + elem = tplg_elem_new(); if (!elem) return NULL; - snd_config_get_id(cfg, &id); - strncpy(elem->id, id, SNDRV_CTL_ELEM_ID_NAME_MAXLEN); - elem->id[SNDRV_CTL_ELEM_ID_NAME_MAXLEN - 1] = 0; + /* do we get name from cfg */ + if (cfg) { + snd_config_get_id(cfg, &id); + elem_copy_text(elem->id, id, SNDRV_CTL_ELEM_ID_NAME_MAXLEN); + elem->id[SNDRV_CTL_ELEM_ID_NAME_MAXLEN - 1] = 0; + } else if (name != NULL) + elem_copy_text(elem->id, name, SNDRV_CTL_ELEM_ID_NAME_MAXLEN); switch (type) { case OBJECT_TYPE_DATA: diff --git a/src/topology/pcm.c b/src/topology/pcm.c index 8f23a6f..deae47b 100644 --- a/src/topology/pcm.c +++ b/src/topology/pcm.c @@ -228,7 +228,7 @@ int tplg_parse_pcm_config(snd_tplg_t *tplg, const char *id; int err; - elem = tplg_elem_new_common(tplg, cfg, OBJECT_TYPE_STREAM_CONFIG); + elem = tplg_elem_new_common(tplg, cfg, NULL, OBJECT_TYPE_STREAM_CONFIG); if (!elem) return -ENOMEM; @@ -294,7 +294,7 @@ int tplg_parse_pcm_caps(snd_tplg_t *tplg, char *s; int err; - elem = tplg_elem_new_common(tplg, cfg, OBJECT_TYPE_STREAM_CAPS); + elem = tplg_elem_new_common(tplg, cfg, NULL, OBJECT_TYPE_STREAM_CAPS); if (!elem) return -ENOMEM; @@ -461,7 +461,7 @@ int tplg_parse_pcm(snd_tplg_t *tplg, const char *id, *val = NULL; int err; - elem = tplg_elem_new_common(tplg, cfg, OBJECT_TYPE_PCM); + elem = tplg_elem_new_common(tplg, cfg, NULL, OBJECT_TYPE_PCM); if (!elem) return -ENOMEM; @@ -524,7 +524,7 @@ int tplg_parse_be(snd_tplg_t *tplg, const char *id, *val = NULL; int err; - elem = tplg_elem_new_common(tplg, cfg, OBJECT_TYPE_BE); + elem = tplg_elem_new_common(tplg, cfg, NULL, OBJECT_TYPE_BE); if (!elem) return -ENOMEM; @@ -587,7 +587,7 @@ int tplg_parse_cc(snd_tplg_t *tplg, const char *id, *val = NULL; int err; - elem = tplg_elem_new_common(tplg, cfg, OBJECT_TYPE_CC); + elem = tplg_elem_new_common(tplg, cfg, NULL, OBJECT_TYPE_CC); if (!elem) return -ENOMEM; diff --git a/src/topology/text.c b/src/topology/text.c index ebb6e38..7128056 100644 --- a/src/topology/text.c +++ b/src/topology/text.c @@ -64,7 +64,7 @@ int tplg_parse_text(snd_tplg_t *tplg, snd_config_t *cfg, int err = 0; struct tplg_elem *elem; - elem = tplg_elem_new_common(tplg, cfg, OBJECT_TYPE_TEXT); + elem = tplg_elem_new_common(tplg, cfg, NULL, OBJECT_TYPE_TEXT); if (!elem) return -ENOMEM; diff --git a/src/topology/tplg_local.h b/src/topology/tplg_local.h index 688c78f..62788e4 100644 --- a/src/topology/tplg_local.h +++ b/src/topology/tplg_local.h @@ -216,7 +216,7 @@ struct tplg_elem *tplg_elem_lookup(struct list_head *base, const char* id, unsigned int type); struct tplg_elem* tplg_elem_new_common(snd_tplg_t *tplg, - snd_config_t *cfg, enum object_type type); + snd_config_t *cfg, const char *name, enum object_type type); static inline void elem_copy_text(char *dest, const char *src, int len) { -- 2.1.4

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[alsa-devel] [PATCH] topology: fix element object type is switch()
by Liam Girdwood 05 Aug '15

05 Aug '15

Use the correct type for this object. Signed-off-by: Liam Girdwood <liam.r.girdwood(a)linux.intel.com> --- src/topology/elem.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/topology/elem.c b/src/topology/elem.c index 32ba2c1..d7a1fd7 100644 --- a/src/topology/elem.c +++ b/src/topology/elem.c @@ -137,7 +137,7 @@ struct tplg_elem* tplg_elem_new_common(snd_tplg_t *tplg, list_add_tail(&elem->list, &tplg->enum_list); obj_size = sizeof(struct snd_soc_tplg_enum_control); break; - case SND_SOC_TPLG_TYPE_MIXER: + case OBJECT_TYPE_MIXER: list_add_tail(&elem->list, &tplg->mixer_list); obj_size = sizeof(struct snd_soc_tplg_mixer_control); break; -- 2.1.4

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[alsa-devel] [PATCH] ALSA: hda - Fix Dell laptop for internal mic/headset mic
by woodrow.shen＠canonical.com 05 Aug '15

05 Aug '15

From: Woodrow Shen <woodrow.shen(a)canonical.com> The new Dell laptop with ALC3266 can't use internal microphone to record. Also, the 3 ring headset mic doesn't work on it. For src of patch_realtek.c, only the pin cfg of Nid 0x17 is different, so the Nid 0x17 is added into pin quirk, and others are defined to macro ALC298_STANDARD_PINS in common use. Codec: Realtek ALC3266 Vendor Id: 0x10ec0298 Subsystem Id: 0x102806e5 BugLink: https://bugs.launchpad.net/bugs/1481575 Signed-off-by: Woodrow Shen <woodrow.shen(a)canonical.com> --- sound/pci/hda/patch_realtek.c | 12 +++++++++--- 1 file changed, 9 insertions(+), 3 deletions(-) diff --git a/sound/pci/hda/patch_realtek.c b/sound/pci/hda/patch_realtek.c index b20f104..294ba67 100644 --- a/sound/pci/hda/patch_realtek.c +++ b/sound/pci/hda/patch_realtek.c @@ -5401,6 +5401,10 @@ static const struct hda_model_fixup alc269_fixup_models[] = { {0x14, 0x90170110}, \ {0x15, 0x0221401f} +#define ALC298_STANDARD_PINS \ + {0x12, 0x90a60130}, \ + {0x21, 0x03211020} + static const struct snd_hda_pin_quirk alc269_pin_fixup_tbl[] = { SND_HDA_PIN_QUIRK(0x10ec0255, 0x1028, "Dell", ALC255_FIXUP_DELL2_MIC_NO_PRESENCE, {0x14, 0x90170110}, @@ -5570,9 +5574,11 @@ static const struct snd_hda_pin_quirk alc269_pin_fixup_tbl[] = { ALC292_STANDARD_PINS, {0x13, 0x90a60140}), SND_HDA_PIN_QUIRK(0x10ec0298, 0x1028, "Dell", ALC298_FIXUP_DELL1_MIC_NO_PRESENCE, - {0x12, 0x90a60130}, - {0x17, 0x90170140}, - {0x21, 0x03211020}), + ALC298_STANDARD_PINS, + {0x17, 0x90170140}), + SND_HDA_PIN_QUIRK(0x10ec0298, 0x1028, "Dell", ALC298_FIXUP_DELL1_MIC_NO_PRESENCE, + ALC298_STANDARD_PINS, + {0x17, 0x90170110}), {} }; -- 2.1.4

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Re: [alsa-devel] When select 2.1 profile in pulseaudio, how do pulseaudio select notebook 's internal subwoofer or 5.1 external speaker ?
by Raymond Yau 05 Aug '15

05 Aug '15

> > > > Do pulseaudio 2.1 profile select the internal subwoofer or your 5.1 > > external speaker ? > > My external speaker (i.e not subwoofer but center). It always was so. > https://git.kernel.org/cgit/linux/kernel/git/tiwai/sound.git/commit/sound/p… +/* default channel maps for 2.1 speakers; + * since HD-audio supports only stereo, odd number channels are omitted + */ +const struct snd_pcm_chmap_elem snd_pcm_2_1_chmaps[] = { + { .channels = 2, + .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR } }, + { .channels = 4, + .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, + SNDRV_CHMAP_LFE, SNDRV_CHMAP_LFE } }, + { } +}; The default 2.1 channel map for internal subwoofer does not has 5.1 channel map But your notebook have three jacks at ext front which support 5.1 In your case,there is no default 2.1 channel map when the current model has three speaker pins after remove the not exist internal surround speakers, [ALC882_FIXUP_ACER_ASPIRE_4930G] = { - .type = HDA_FIXUP_PINS, - .v.pins = (const struct hda_pintbl[]) { - { 0x16, 0x99130111 }, /* CLFE speaker */ - { 0x17, 0x99130112 }, /* surround speaker */ - { } - }, you need to use the left channel version of 2.1 channel and 5.1 channel map +static const struct snd_pcm_chmap_elem acer_pcm_chmaps[] = { + { .channels = 2, + .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR } }, + { .channels = 4, + .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, + SNDRV_CHMAP_LFE, SNDRV_CHMAP_NA } }, /* LFE only on left */ + { .channels = 4, + .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, + SNDRV_CHMAP_RL, SNDRV_CHMAP_RR } }, + { .channels = 6, + .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, + SNDRV_CHMAP_RL, SNDRV_CHMAP_RR, + SNDRV_CHMAP_FC, SNDRV_CHMAP_LFE } }, + { } +}; http://git.alsa-project.org/?p=alsa-lib.git;a=commitdiff;h=48f1b308cc66152e… <http://git.alsa-project.org/?p=alsa-lib.git;a=commitdiff;h=48f1b308cc66152e…> conf: Allow 2.1 surround to use different number of channels This way, cards that support LFE on four channels (e g laptop with internal subwoofer) can do that, and other cards on a six channel setup can use that as well. which channel map is used by alsa lib when you open surround21 pcm device since your notebook will have both channel maps ?

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[alsa-devel] [RFC][PATCH 0/2] ALSA: fireworks/firewire-lib: add support for recent firmware quirk
by Takashi Sakamoto 05 Aug '15

05 Aug '15

Some users have reported current ALSA Fireworks driver stops packet streaming due to detecting discontinuity. [alsa-devel] ALSA snd-fireworks Echo AudioFire 2 http://mailman.alsa-project.org/pipermail/alsa-devel/2014-August/080379.html [alsa-devel] AudioFire4 quirk http://mailman.alsa-project.org/pipermail/alsa-devel/2015-July/095697.html As long as I investigate, this issue depends on firmware version installed in these devices. While, it's not clear that which version of firmwares for which model has this quirk. At least, firmware version 5.7.0, 5.7.3 and 5.8.0 for AudioFire2/AudioFire4/AudioFirePre8 have this quirk. This patchset applies a solution for this issue, with my assumption that 'the same firmware binary has the same quirk'. These models, AudioFire8 (since Jul 2009) and Gibson Robot Interface Pack (RIP) series uses the same firmware binary in driver package. Takashi Sakamoto (2): Revert "ALSA: fireworks: add support for AudioFire2 quirk" ALSA: fireworks/firewire-lib: add support for recent firmware quirk sound/firewire/amdtp.c | 5 +++-- sound/firewire/amdtp.h | 2 ++ sound/firewire/fireworks/fireworks.c | 10 ++++++++-- sound/firewire/fireworks/fireworks.h | 2 +- sound/firewire/fireworks/fireworks_stream.c | 12 +++++++++--- 5 files changed, 23 insertions(+), 8 deletions(-) -- 2.1.4

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Re: [alsa-devel] ASoC: dapm: Simplify list creation in dapm_dai_get_connected_widgets()
by Dan Carpenter 04 Aug '15

04 Aug '15

Hello Lars-Peter Clausen, The patch 1ce43acff0c0: "ASoC: dapm: Simplify list creation in dapm_dai_get_connected_widgets()" from Jul 26, 2015, leads to the following static checker warning: sound/soc/soc-dapm.c:1199 snd_soc_dapm_dai_get_connected_widgets() warn: inconsistent returns 'mutex:&card->dapm_mutex'. Locked on: line 1194 Unlocked on: line 1199 sound/soc/soc-dapm.c 1164 int snd_soc_dapm_dai_get_connected_widgets(struct snd_soc_dai *dai, int stream, 1165 struct snd_soc_dapm_widget_list **list) 1166 { 1167 struct snd_soc_card *card = dai->component->card; 1168 struct snd_soc_dapm_widget *w; 1169 LIST_HEAD(widgets); 1170 int paths; 1171 int ret; 1172 1173 mutex_lock_nested(&card->dapm_mutex, SND_SOC_DAPM_CLASS_RUNTIME); 1174 1175 /* 1176 * For is_connected_{output,input}_ep fully discover the graph we need 1177 * to reset the cached number of inputs and outputs. 1178 */ 1179 list_for_each_entry(w, &card->widgets, list) { 1180 w->inputs = -1; 1181 w->outputs = -1; 1182 } 1183 1184 if (stream == SNDRV_PCM_STREAM_PLAYBACK) 1185 paths = is_connected_output_ep(dai->playback_widget, &widgets); 1186 else 1187 paths = is_connected_input_ep(dai->capture_widget, &widgets); 1188 1189 /* Drop starting point */ 1190 list_del(widgets.next); 1191 1192 ret = dapm_widget_list_create(list, &widgets); 1193 if (ret) 1194 return ret; ^^^^^^^^^^^ Holding card->dapm_mutex. 1195 1196 trace_snd_soc_dapm_connected(paths, stream); 1197 mutex_unlock(&card->dapm_mutex); 1198 1199 return paths; 1200 } regards, dan carpenter

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[alsa-devel] [TRIVIAL PATCH V2] ASoC: atmel_ssc_dai: Correct misuse of 0x%<decimal>
by Joe Perches 04 Aug '15

04 Aug '15

Correct misuse of 0x%d in logging message. Signed-off-by: Joe Perches <joe(a)perches.com> --- Resend with later, non-broken version of Evolution email client (3.16 -> 3.16.3) sound/soc/atmel/atmel_ssc_dai.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/sound/soc/atmel/atmel_ssc_dai.c b/sound/soc/atmel/atmel_ssc_dai.c index 841d059..ba8def5 100644 --- a/sound/soc/atmel/atmel_ssc_dai.c +++ b/sound/soc/atmel/atmel_ssc_dai.c @@ -290,7 +290,7 @@ static int atmel_ssc_startup(struct snd_pcm_substream *substream, int dir, dir_mask; int ret; - pr_debug("atmel_ssc_startup: SSC_SR=0x%u\n", + pr_debug("atmel_ssc_startup: SSC_SR=0x%x\n", ssc_readl(ssc_p->ssc->regs, SR)); /* Enable PMC peripheral clock for this SSC */

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[alsa-devel] [PATCH] ASoC: topology: fix typo in soc_tplg_kcontrol_bind_io()
by Liam Girdwood 04 Aug '15

04 Aug '15

From: Mengdong Lin <mengdong.lin(a)intel.com> Signed-off-by: Mengdong Lin <mengdong.lin(a)intel.com> Signed-off-by: Liam Girdwood <liam.r.girdwood(a)linux.intel.com> --- sound/soc/soc-topology.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/sound/soc/soc-topology.c b/sound/soc/soc-topology.c index df3ddf0..4dadb5e 100644 --- a/sound/soc/soc-topology.c +++ b/sound/soc/soc-topology.c @@ -534,7 +534,7 @@ static int soc_tplg_kcontrol_bind_io(struct snd_soc_tplg_ctl_hdr *hdr, k->put = bops[i].put; if (k->get == NULL && bops[i].id == hdr->ops.get) k->get = bops[i].get; - if (k->info == NULL && ops[i].id == hdr->ops.info) + if (k->info == NULL && bops[i].id == hdr->ops.info) k->info = bops[i].info; } -- 2.1.4

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[alsa-devel] [PATCH] ASoC: nau8825: Add driver for headset chip Nuvoton 8825
by Anatol Pomozov 04 Aug '15

04 Aug '15

Signed-off-by: Anatol Pomozov <anatol.pomozov(a)gmail.com> --- .../devicetree/bindings/sound/nau8825.txt | 18 + sound/soc/codecs/Kconfig | 4 + sound/soc/codecs/Makefile | 2 + sound/soc/codecs/nau8825.c | 874 +++++++++++++++++++++ sound/soc/codecs/nau8825.h | 262 ++++++ 5 files changed, 1160 insertions(+) create mode 100644 Documentation/devicetree/bindings/sound/nau8825.txt create mode 100644 sound/soc/codecs/nau8825.c create mode 100644 sound/soc/codecs/nau8825.h diff --git a/Documentation/devicetree/bindings/sound/nau8825.txt b/Documentation/devicetree/bindings/sound/nau8825.txt new file mode 100644 index 0000000..c3beb37 --- /dev/null +++ b/Documentation/devicetree/bindings/sound/nau8825.txt @@ -0,0 +1,18 @@ +Nuvoton NAU8825 audio codec + +This device supports I2C only. + +Required properties: + - compatible : Must be "nuvoton,nau8825" + - reg : the I2C address of the device. This is either 0x1a (CSB=0) or 0x1b (CSB=1). + +Optional properties: + - nuvoton,jkdet-pullup: Pull-up JKDET pin. Boolean. + +Example: + + codec: nau8825@1a { + compatible = "nuvoton,nau8825"; + reg = <0x1a>; + nuvoton,jkdet-pullup = "true"; + }; diff --git a/sound/soc/codecs/Kconfig b/sound/soc/codecs/Kconfig index 7fcbc22..1a3639c 100644 --- a/sound/soc/codecs/Kconfig +++ b/sound/soc/codecs/Kconfig @@ -78,6 +78,7 @@ config SND_SOC_ALL_CODECS select SND_SOC_MAX9877 if I2C select SND_SOC_MC13783 if MFD_MC13XXX select SND_SOC_ML26124 if I2C + select SND_SOC_NAU8825 if I2C select SND_SOC_HDMI_CODEC select SND_SOC_PCM1681 if I2C select SND_SOC_PCM1792A if SPI_MASTER @@ -892,6 +893,9 @@ config SND_SOC_MC13783 config SND_SOC_ML26124 tristate +config SND_SOC_NAU8825 + tristate + config SND_SOC_TPA6130A2 tristate "Texas Instruments TPA6130A2 headphone amplifier" depends on I2C diff --git a/sound/soc/codecs/Makefile b/sound/soc/codecs/Makefile index 5b46c8f..4874881 100644 --- a/sound/soc/codecs/Makefile +++ b/sound/soc/codecs/Makefile @@ -71,6 +71,7 @@ snd-soc-max98925-objs := max98925.o snd-soc-max9850-objs := max9850.o snd-soc-mc13783-objs := mc13783.o snd-soc-ml26124-objs := ml26124.o +snd-soc-nau8825-objs := nau8825.o snd-soc-hdmi-codec-objs := hdmi.o snd-soc-pcm1681-objs := pcm1681.o snd-soc-pcm1792a-codec-objs := pcm1792a.o @@ -262,6 +263,7 @@ obj-$(CONFIG_SND_SOC_MAX98925) += snd-soc-max98925.o obj-$(CONFIG_SND_SOC_MAX9850) += snd-soc-max9850.o obj-$(CONFIG_SND_SOC_MC13783) += snd-soc-mc13783.o obj-$(CONFIG_SND_SOC_ML26124) += snd-soc-ml26124.o +obj-$(CONFIG_SND_SOC_NAU8825) += snd-soc-nau8825.o obj-$(CONFIG_SND_SOC_HDMI_CODEC) += snd-soc-hdmi-codec.o obj-$(CONFIG_SND_SOC_PCM1681) += snd-soc-pcm1681.o obj-$(CONFIG_SND_SOC_PCM1792A) += snd-soc-pcm1792a-codec.o diff --git a/sound/soc/codecs/nau8825.c b/sound/soc/codecs/nau8825.c new file mode 100644 index 0000000..db24465 --- /dev/null +++ b/sound/soc/codecs/nau8825.c @@ -0,0 +1,874 @@ +/* + * NAU8825 audio codec driver + * + * Copyright 2015 Nuvoton Technology Corp. + * Copyright 2015 Google Chromium project. + * Author: Anatol Pomozov <anatol(a)chromium.org> + * + * Licensed under the GPL-2. + */ + +#include <linux/module.h> +#include <linux/delay.h> +#include <linux/init.h> +#include <linux/i2c.h> +#include <linux/regmap.h> +#include <linux/slab.h> +#include <sound/initval.h> +#include <sound/tlv.h> +#include <linux/input.h> + +#include <sound/core.h> +#include <sound/pcm.h> +#include <sound/pcm_params.h> +#include <sound/soc.h> +#include <sound/jack.h> + +#include "nau8825.h" + +struct nau8825 { + struct device *dev; + struct regmap *regmap; + struct snd_soc_dapm_context *dapm; + int irq; + struct snd_soc_jack *jack; + int button_pressed; + bool jkdet_pullup; +}; + +static const struct reg_default nau8825_reg_defaults[] = { + { NAU8825_REG_ENA_CTRL, 0x00ff }, + { NAU8825_REG_CLK_DIVIDER, 0x0050 }, + { NAU8825_REG_FLL1, 0x0 }, + { NAU8825_REG_FLL2, 0x3126 }, + { NAU8825_REG_FLL3, 0x0008 }, + { NAU8825_REG_FLL4, 0x0010 }, + { NAU8825_REG_FLL5, 0x0 }, + { NAU8825_REG_FLL6, 0x6000 }, + { NAU8825_REG_FLL_VCO_RSV, 0xf13c }, + { NAU8825_REG_HSD_CTRL, 0x000c }, + { NAU8825_REG_JACK_DET_CTRL, 0x0 }, + { NAU8825_REG_INTERRUPT_MASK, 0x0 }, + { NAU8825_REG_INTERRUPT_DIS_CTRL, 0xffff }, + { NAU8825_REG_SAR_CTRL, 0x0015 }, + { NAU8825_REG_KEYDET_CTRL, 0x0110 }, + { NAU8825_REG_VDET_THRESHOLD_1, 0x0 }, + { NAU8825_REG_VDET_THRESHOLD_2, 0x0 }, + { NAU8825_REG_VDET_THRESHOLD_3, 0x0 }, + { NAU8825_REG_VDET_THRESHOLD_4, 0x0 }, + { NAU8825_REG_GPIO34_CTRL, 0x0 }, + { NAU8825_REG_GPIO12_CTRL, 0x0 }, + { NAU8825_REG_TDM_CTRL, 0x0 }, + { NAU8825_REG_I2S_PCM_CTRL1, 0x000b }, + { NAU8825_REG_I2S_PCM_CTRL2, 0x8010 }, + { NAU8825_REG_LEFT_TIME_SLOT, 0x0 }, + { NAU8825_REG_RIGHT_TIME_SLOT, 0x0 }, + { NAU8825_REG_BIQ_CTRL, 0x0 }, + { NAU8825_REG_BIQ_COF1, 0x0 }, + { NAU8825_REG_BIQ_COF2, 0x0 }, + { NAU8825_REG_BIQ_COF3, 0x0 }, + { NAU8825_REG_BIQ_COF4, 0x0 }, + { NAU8825_REG_BIQ_COF5, 0x0 }, + { NAU8825_REG_BIQ_COF6, 0x0 }, + { NAU8825_REG_BIQ_COF7, 0x0 }, + { NAU8825_REG_BIQ_COF8, 0x0 }, + { NAU8825_REG_BIQ_COF9, 0x0 }, + { NAU8825_REG_BIQ_COF10, 0x0 }, + { NAU8825_REG_ADC_RATE, 0x0010 }, + { NAU8825_REG_DAC_CTRL1, 0x0001 }, + { NAU8825_REG_DAC_CTRL2, 0x0 }, + { NAU8825_REG_DAC_DGAIN_CTRL, 0x0 }, + { NAU8825_REG_ADC_DGAIN_CTRL, 0x00cf }, + { NAU8825_REG_MUTE_CTRL, 0x0 }, + { NAU8825_REG_HSVOL_CTRL, 0x0 }, + { NAU8825_REG_DACL_CTRL, 0x02cf }, + { NAU8825_REG_DACR_CTRL, 0x00cf }, + { NAU8825_REG_ADC_DRC_KNEE_IP12, 0x1486 }, + { NAU8825_REG_ADC_DRC_KNEE_IP34, 0x0f12 }, + { NAU8825_REG_ADC_DRC_SLOPES, 0x25ff }, + { NAU8825_REG_ADC_DRC_ATKDCY, 0x3457 }, + { NAU8825_REG_DAC_DRC_KNEE_IP12, 0x1486 }, + { NAU8825_REG_DAC_DRC_KNEE_IP34, 0x0f12 }, + { NAU8825_REG_DAC_DRC_SLOPES, 0x25f9 }, + { NAU8825_REG_DAC_DRC_ATKDCY, 0x3457 }, + { NAU8825_REG_IMM_MODE_CTRL, 0x0 }, + { NAU8825_REG_CLASSG_CTRL, 0x0 }, + { NAU8825_REG_OPT_EFUSE_CTRL, 0x0 }, + { NAU8825_REG_MISC_CTRL, 0x0 }, + { NAU8825_REG_BIAS_ADJ, 0x0 }, + { NAU8825_REG_TRIM_SETTINGS, 0x0 }, + { NAU8825_REG_ANALOG_CONTROL_1, 0x0 }, + { NAU8825_REG_ANALOG_CONTROL_2, 0x0 }, + { NAU8825_REG_ANALOG_ADC_1, 0x0011 }, + { NAU8825_REG_ANALOG_ADC_2, 0x0020 }, + { NAU8825_REG_RDAC, 0x0008 }, + { NAU8825_REG_MIC_BIAS, 0x0006 }, + { NAU8825_REG_BOOST, 0x0 }, + { NAU8825_REG_FEPGA, 0x0 }, + { NAU8825_REG_POWER_UP_CONTROL, 0x0 }, + { NAU8825_REG_CHARGE_PUMP, 0x0 }, +}; + +static bool nau8825_readable_reg(struct device *dev, unsigned int reg) +{ + switch (reg) { + case NAU8825_REG_ENA_CTRL: + case NAU8825_REG_CLK_DIVIDER ... NAU8825_REG_FLL_VCO_RSV: + case NAU8825_REG_HSD_CTRL ... NAU8825_REG_JACK_DET_CTRL: + case NAU8825_REG_INTERRUPT_MASK ... NAU8825_REG_KEYDET_CTRL: + case NAU8825_REG_VDET_THRESHOLD_1 ... NAU8825_REG_DACR_CTRL: + case NAU8825_REG_ADC_DRC_KNEE_IP12 ... NAU8825_REG_ADC_DRC_ATKDCY: + case NAU8825_REG_DAC_DRC_KNEE_IP12 ... NAU8825_REG_DAC_DRC_ATKDCY: + case NAU8825_REG_IMM_MODE_CTRL ... NAU8825_REG_IMM_RMS_R: + case NAU8825_REG_CLASSG_CTRL ... NAU8825_REG_OPT_EFUSE_CTRL: + case NAU8825_REG_MISC_CTRL: + case NAU8825_REG_I2C_DEVICE_ID ... NAU8825_REG_SARDOUT_RAM_STATUS: + case NAU8825_REG_BIAS_ADJ: + case NAU8825_REG_TRIM_SETTINGS ... NAU8825_REG_ANALOG_CONTROL_2: + case NAU8825_REG_ANALOG_ADC_1 ... NAU8825_REG_MIC_BIAS: + case NAU8825_REG_BOOST ... NAU8825_REG_FEPGA: + case NAU8825_REG_POWER_UP_CONTROL ... NAU8825_REG_GENERAL_STATUS: + return true; + default: + return false; + } + +} + +static bool nau8825_writeable_reg(struct device *dev, unsigned int reg) +{ + switch (reg) { + case NAU8825_REG_RESET ... NAU8825_REG_ENA_CTRL: + case NAU8825_REG_CLK_DIVIDER ... NAU8825_REG_FLL_VCO_RSV: + case NAU8825_REG_HSD_CTRL ... NAU8825_REG_JACK_DET_CTRL: + case NAU8825_REG_INTERRUPT_MASK: + case NAU8825_REG_INT_CLR_KEY_STATUS ... NAU8825_REG_KEYDET_CTRL: + case NAU8825_REG_VDET_THRESHOLD_1 ... NAU8825_REG_DACR_CTRL: + case NAU8825_REG_ADC_DRC_KNEE_IP12 ... NAU8825_REG_ADC_DRC_ATKDCY: + case NAU8825_REG_DAC_DRC_KNEE_IP12 ... NAU8825_REG_DAC_DRC_ATKDCY: + case NAU8825_REG_IMM_MODE_CTRL: + case NAU8825_REG_CLASSG_CTRL ... NAU8825_REG_OPT_EFUSE_CTRL: + case NAU8825_REG_MISC_CTRL: + case NAU8825_REG_BIAS_ADJ: + case NAU8825_REG_TRIM_SETTINGS ... NAU8825_REG_ANALOG_CONTROL_2: + case NAU8825_REG_ANALOG_ADC_1 ... NAU8825_REG_MIC_BIAS: + case NAU8825_REG_BOOST ... NAU8825_REG_FEPGA: + case NAU8825_REG_POWER_UP_CONTROL ... NAU8825_REG_CHARGE_PUMP: + return true; + default: + return false; + } +} + +static bool nau8825_volatile_reg(struct device *dev, unsigned int reg) +{ + switch (reg) { + case NAU8825_REG_RESET: + case NAU8825_REG_IRQ_STATUS: + case NAU8825_REG_INT_CLR_KEY_STATUS: + case NAU8825_REG_IMM_RMS_L: + case NAU8825_REG_IMM_RMS_R: + case NAU8825_REG_I2C_DEVICE_ID: + case NAU8825_REG_SARDOUT_RAM_STATUS: + case NAU8825_REG_CHARGE_PUMP_INPUT_READ: + case NAU8825_REG_GENERAL_STATUS: + return true; + default: + return false; + } +} + +static const DECLARE_TLV_DB_MINMAX_MUTE(adc_vol_tlv, -10300, 2400); +static const DECLARE_TLV_DB_MINMAX_MUTE(sidetone_vol_tlv, -4200, 0); +static const DECLARE_TLV_DB_MINMAX(dac_vol_tlv, -5400, 0); +static const DECLARE_TLV_DB_MINMAX(fepga_gain_tlv, -100, 3600); + +static const struct snd_kcontrol_new nau8825_snd_controls[] = { + SOC_SINGLE_TLV("MIC Volume", NAU8825_REG_ADC_DGAIN_CTRL, + 0, 0xff, 0, adc_vol_tlv), + SOC_DOUBLE_TLV("HP Sidetone Volume", NAU8825_REG_ADC_DGAIN_CTRL, + 12, 8, 0x0f, 0, sidetone_vol_tlv), + SOC_DOUBLE_TLV("HP Volume", NAU8825_REG_HSVOL_CTRL, + 6, 0, 0x3f, 1, dac_vol_tlv), + SOC_SINGLE_TLV("Frontend PGA Gain", NAU8825_REG_POWER_UP_CONTROL, + 8, 37, 0, fepga_gain_tlv), +}; + +static int nau8825_charge_pump_event(struct snd_soc_dapm_widget *w, + struct snd_kcontrol *kcontrol, int event) +{ + struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); + struct nau8825 *nau8825 = snd_soc_codec_get_drvdata(codec); + struct regmap *regmap = nau8825->regmap; + + if (SND_SOC_DAPM_EVENT_ON(event)) { + regmap_update_bits(regmap, NAU8825_REG_CHARGE_PUMP, + NAU8825_JAMNODCLOW, NAU8825_JAMNODCLOW); + } else { + regmap_update_bits(regmap, NAU8825_REG_CHARGE_PUMP, + NAU8825_JAMNODCLOW, 0); + } + + return 0; +} + +static int nau8825_output_driver_event(struct snd_soc_dapm_widget *w, + struct snd_kcontrol *kcontrol, int event) +{ + struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); + struct nau8825 *nau8825 = snd_soc_codec_get_drvdata(codec); + struct regmap *regmap = nau8825->regmap; + + if (SND_SOC_DAPM_EVENT_ON(event)) { + /* Power Up L and R Output Drivers */ + regmap_update_bits(regmap, NAU8825_REG_POWER_UP_CONTROL, 0x3c, + 0x3c); + /* Power up Main Output Drivers (The main driver must be turned + on after the predriver to avoid pops) */ + regmap_update_bits(regmap, NAU8825_REG_POWER_UP_CONTROL, 0x3, + 0x3); + } else { + /* Power Down L and R Output Drivers */ + regmap_update_bits(regmap, NAU8825_REG_POWER_UP_CONTROL, 0x3f, + 0x0); + } + + return 0; +} + +/* DAC Mux 0x33[9] and 0x34[9] */ +static const char * const nau8825_dac_src[] = { + "DACL", "DACR", +}; + +static SOC_ENUM_SINGLE_DECL( + nau8825_dacl_enum, NAU8825_REG_DACL_CTRL, + NAU8825_DACL_CH_SEL_SFT, nau8825_dac_src); + +static SOC_ENUM_SINGLE_DECL( + nau8825_dacr_enum, NAU8825_REG_DACR_CTRL, + NAU8825_DACR_CH_SEL_SFT, nau8825_dac_src); + +static const struct snd_kcontrol_new nau8825_dacl_mux = + SOC_DAPM_ENUM("DACL Source", nau8825_dacl_enum); + +static const struct snd_kcontrol_new nau8825_dacr_mux = + SOC_DAPM_ENUM("DACR Source", nau8825_dacr_enum); + +static const struct snd_soc_dapm_widget nau8825_dapm_widgets[] = { + SND_SOC_DAPM_INPUT("MIC"), + SND_SOC_DAPM_MICBIAS("MICBIAS", NAU8825_REG_MIC_BIAS, 8, 0), + + SND_SOC_DAPM_PGA("Frontend PGA", NAU8825_REG_POWER_UP_CONTROL, 14, 0, + NULL, 0), + + SND_SOC_DAPM_ADC("ADC", NULL, NAU8825_REG_ENA_CTRL, 8, 0), + SND_SOC_DAPM_SUPPLY("ADC Clock", NAU8825_REG_ENA_CTRL, 7, 0, NULL, 0), + + /* ADC for button press detection */ + SND_SOC_DAPM_ADC("SAR", NULL, NAU8825_REG_SAR_CTRL, + NAU8825_SAR_ADC_EN_SFT, 0), + + SND_SOC_DAPM_DAC("ADACL", NULL, NAU8825_REG_RDAC, 12, 0), + SND_SOC_DAPM_DAC("ADACR", NULL, NAU8825_REG_RDAC, 13, 0), + SND_SOC_DAPM_SUPPLY("ADACL Clock", NAU8825_REG_RDAC, 8, 0, NULL, 0), + SND_SOC_DAPM_SUPPLY("ADACR Clock", NAU8825_REG_RDAC, 9, 0, NULL, 0), + + SND_SOC_DAPM_DAC("DDACR", NULL, NAU8825_REG_ENA_CTRL, + NAU8825_ENABLE_DACR_SFT, 0), + SND_SOC_DAPM_DAC("DDACL", NULL, NAU8825_REG_ENA_CTRL, + NAU8825_ENABLE_DACL_SFT, 0), + SND_SOC_DAPM_SUPPLY("DDAC Clock", NAU8825_REG_ENA_CTRL, 6, 0, NULL, 0), + + SND_SOC_DAPM_MUX("DACL Mux", SND_SOC_NOPM, 0, 0, + &nau8825_dacl_mux), + SND_SOC_DAPM_MUX("DACR Mux", SND_SOC_NOPM, 0, 0, + &nau8825_dacr_mux), + + SND_SOC_DAPM_PGA("HP amp L", NAU8825_REG_CLASSG_CTRL, 1, 0, NULL, 0), + SND_SOC_DAPM_PGA("HP amp R", NAU8825_REG_CLASSG_CTRL, 2, 0, NULL, 0), + SND_SOC_DAPM_SUPPLY("HP amp power", NAU8825_REG_CLASSG_CTRL, 0, 0, NULL, + 0), + + SND_SOC_DAPM_SUPPLY("Change Pump", NAU8825_REG_CHARGE_PUMP, 5, 0, + nau8825_charge_pump_event, + SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD), + + SND_SOC_DAPM_SUPPLY("DACL Power", NAU8825_REG_CHARGE_PUMP, 8, 1, NULL, + 0), + SND_SOC_DAPM_SUPPLY("DACR Power", NAU8825_REG_CHARGE_PUMP, 9, 1, NULL, + 0), + + SND_SOC_DAPM_OUT_DRV_E("Output Driver", SND_SOC_NOPM, 0, 0, NULL, 0, + nau8825_output_driver_event, + SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), + + SND_SOC_DAPM_OUTPUT("HPOL"), + SND_SOC_DAPM_OUTPUT("HPOR"), +}; + +static const struct snd_soc_dapm_route nau8825_dapm_routes[] = { + {"Frontend PGA", NULL, "MIC"}, + {"ADC", NULL, "Frontend PGA"}, + {"ADC", NULL, "ADC Clock"}, + {"Capture", NULL, "ADC"}, + + {"DDACL", NULL, "Playback"}, + {"DDACR", NULL, "Playback"}, + {"DDACL", NULL, "DDAC Clock"}, + {"DDACR", NULL, "DDAC Clock"}, + {"DDACL", NULL, "DACL Power"}, + {"DDACR", NULL, "DACR Power"}, + {"DACL Mux", "DACL", "DDACL"}, + {"DACL Mux", "DACR", "DDACR"}, + {"DACR Mux", "DACL", "DDACL"}, + {"DACR Mux", "DACR", "DDACR"}, + {"HP amp L", NULL, "Change Pump"}, + {"HP amp R", NULL, "Change Pump"}, + {"HP amp L", NULL, "DACL Mux"}, + {"HP amp R", NULL, "DACR Mux"}, + {"HP amp L", NULL, "HP amp power"}, + {"HP amp R", NULL, "HP amp power"}, + {"ADACL", NULL, "HP amp L"}, + {"ADACR", NULL, "HP amp R"}, + {"ADACL", NULL, "ADACL Clock"}, + {"ADACR", NULL, "ADACR Clock"}, + {"Output Driver", NULL, "ADACL"}, + {"Output Driver", NULL, "ADACR"}, + {"HPOL", NULL, "Output Driver"}, + {"HPOR", NULL, "Output Driver"}, +}; + +static int nau8825_hw_params(struct snd_pcm_substream *substream, + struct snd_pcm_hw_params *params, + struct snd_soc_dai *dai) +{ + struct snd_soc_codec *codec = dai->codec; + struct nau8825 *nau8825 = snd_soc_codec_get_drvdata(codec); + unsigned int val_len = 0; + + switch (params_width(params)) { + case 16: + val_len |= NAU8825_I2S_DL_16; + break; + case 20: + val_len |= NAU8825_I2S_DL_20; + break; + case 24: + val_len |= NAU8825_I2S_DL_24; + break; + case 32: + val_len |= NAU8825_I2S_DL_32; + break; + default: + return -EINVAL; + } + regmap_update_bits(nau8825->regmap, NAU8825_REG_I2S_PCM_CTRL1, + NAU8825_I2S_DL_MASK, val_len); + + return 0; +} + +static int nau8825_mute(struct snd_soc_dai *codec_dai, int mute) +{ + struct snd_soc_codec *codec = codec_dai->codec; + struct nau8825 *nau8825 = snd_soc_codec_get_drvdata(codec); + int reg_val; + + reg_val = mute ? NAU8825_HP_MUTE : 0; + regmap_update_bits(nau8825->regmap, NAU8825_REG_HSVOL_CTRL, + NAU8825_HP_MUTE, reg_val); + + return 0; +} + +static int nau8825_set_dai_fmt(struct snd_soc_dai *codec_dai, unsigned int fmt) +{ + struct snd_soc_codec *codec = codec_dai->codec; + struct nau8825 *nau8825 = snd_soc_codec_get_drvdata(codec); + unsigned int ctrl1_val = 0, ctrl2_val = 0; + + switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { + case SND_SOC_DAIFMT_CBM_CFM: + ctrl2_val |= NAU8825_I2S_MS_MASTER; + break; + case SND_SOC_DAIFMT_CBS_CFS: + break; + default: + return -EINVAL; + } + + switch (fmt & SND_SOC_DAIFMT_INV_MASK) { + case SND_SOC_DAIFMT_NB_NF: + break; + case SND_SOC_DAIFMT_IB_NF: + ctrl1_val |= NAU8825_I2S_BP_INV; + break; + default: + return -EINVAL; + } + + switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { + case SND_SOC_DAIFMT_I2S: + ctrl1_val |= NAU8825_I2S_DF_I2S; + break; + case SND_SOC_DAIFMT_LEFT_J: + ctrl1_val |= NAU8825_I2S_DF_LEFT; + break; + case SND_SOC_DAIFMT_RIGHT_J: + ctrl1_val |= NAU8825_I2S_DF_RIGTH; + break; + case SND_SOC_DAIFMT_DSP_A: + ctrl1_val |= NAU8825_I2S_DF_PCM_AB; + break; + case SND_SOC_DAIFMT_DSP_B: + ctrl1_val |= NAU8825_I2S_DF_PCM_AB; + ctrl1_val |= NAU8825_I2S_PCMB_EN; + break; + default: + return -EINVAL; + } + + regmap_update_bits(nau8825->regmap, NAU8825_REG_I2S_PCM_CTRL1, + NAU8825_I2S_DL_MASK | NAU8825_I2S_DF_MASK | + NAU8825_I2S_BP_MASK | NAU8825_I2S_PCMB_MASK, + ctrl1_val); + regmap_update_bits(nau8825->regmap, NAU8825_REG_I2S_PCM_CTRL2, + NAU8825_I2S_MS_MASK, ctrl2_val); + + return 0; +} + +static const struct snd_soc_dai_ops nau8825_dai_ops = { + .hw_params = nau8825_hw_params, + .digital_mute = nau8825_mute, + .set_fmt = nau8825_set_dai_fmt, +}; + +#define NAU8825_RATES SNDRV_PCM_RATE_8000_192000 +#define NAU8825_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE \ + | SNDRV_PCM_FMTBIT_S24_3LE | SNDRV_PCM_FMTBIT_S32_LE) + +static struct snd_soc_dai_driver nau8825_dai = { + .name = "nau8825-hifi", + .playback = { + .stream_name = "Playback", + .channels_min = 1, + .channels_max = 2, + .rates = NAU8825_RATES, + .formats = NAU8825_FORMATS, + }, + .capture = { + .stream_name = "Capture", + .channels_min = 1, + .channels_max = 1, + .rates = NAU8825_RATES, + .formats = NAU8825_FORMATS, + }, + .ops = &nau8825_dai_ops, +}; + +/** + * nau8825_enable_jack_detect - Specify a jack for event reporting + * + * @component: component to register the jack with + * @jack: jack to use to report headset and button events on + * + * After this function has been called the headset insert/remove and button + * events will be routed to the given jack. Jack can be null to stop + * reporting. + */ +int nau8825_enable_jack_detect(struct snd_soc_codec *codec, + struct snd_soc_jack *jack) +{ + struct nau8825 *nau8825 = snd_soc_codec_get_drvdata(codec); + + snd_jack_set_key(jack->jack, SND_JACK_BTN_0, KEY_MEDIA); + snd_jack_set_key(jack->jack, SND_JACK_BTN_1, KEY_VOICECOMMAND); + snd_jack_set_key(jack->jack, SND_JACK_BTN_2, KEY_VOLUMEUP); + snd_jack_set_key(jack->jack, SND_JACK_BTN_3, KEY_VOLUMEDOWN); + + nau8825->jack = jack; + + return 0; +} +EXPORT_SYMBOL_GPL(nau8825_enable_jack_detect); + + +static bool nau8825_is_jack_inserted(struct regmap *regmap) +{ + int status; + + regmap_read(regmap, NAU8825_REG_I2C_DEVICE_ID, &status); + return !(status & NAU8825_GPIO2JD1); +} + +static void nau8825_restart_jack_detection(struct regmap *regmap) +{ + /* this will restart the entire jack detection process including MIC/GND + * switching and create interrupts. We have to go from 0 to 1 and back + * to 0 to restart. + */ + regmap_update_bits(regmap, NAU8825_REG_JACK_DET_CTRL, + NAU8825_JACK_DET_RESTART, NAU8825_JACK_DET_RESTART); + regmap_update_bits(regmap, NAU8825_REG_JACK_DET_CTRL, + NAU8825_JACK_DET_RESTART, 0); +} + +static void nau8825_eject_jack(struct nau8825 *nau8825) +{ + struct snd_soc_dapm_context *dapm = nau8825->dapm; + struct regmap *regmap = nau8825->regmap; + + snd_soc_dapm_disable_pin(dapm, "SAR"); + snd_soc_dapm_disable_pin(dapm, "MICBIAS"); + /* Detach 2kOhm Resistors from MICBIAS to MICGND1/2 */ + regmap_update_bits(regmap, NAU8825_REG_MIC_BIAS, + NAU8825_MICBIAS_JKSLV | NAU8825_MICBIAS_JKR2, 0); + /* ground HPL/HPR, MICGRND1/2 */ + regmap_update_bits(regmap, NAU8825_REG_HSD_CTRL, 0xf, 0xf); + + snd_soc_dapm_sync(dapm); +} + +static int nau8825_button_decode(int value) +{ + int buttons; + + if (value & BIT(0)) + buttons |= SND_JACK_BTN_0; + if (value & BIT(1)) + buttons |= SND_JACK_BTN_1; + if (value & BIT(2)) + buttons |= SND_JACK_BTN_2; + if (value & BIT(3)) + buttons |= SND_JACK_BTN_3; + + return buttons; +} + +static int nau8825_jack_insert(struct nau8825 *nau8825) +{ + struct regmap *regmap = nau8825->regmap; + struct snd_soc_dapm_context *dapm = nau8825->dapm; + int jack_status_reg, mic_detected; + int type; + + regmap_read(regmap, NAU8825_REG_GENERAL_STATUS, &jack_status_reg); + mic_detected = (jack_status_reg >> 10) & 3; + + switch (mic_detected) { + case 0: + /* no mic */ + type = SND_JACK_HEADPHONE; + break; + case 1: + dev_dbg(nau8825->dev, "OMTP (micgnd1) mic connected\n"); + type = SND_JACK_HEADSET; + + /* Unground MICGND1 */ + regmap_update_bits(regmap, NAU8825_REG_HSD_CTRL, 3 << 2, + 1 << 2); + /* Unground HPL/R */ + regmap_update_bits(regmap, NAU8825_REG_HSD_CTRL, 0x3, 0); + /* Attach 2kOhm Resistor from MICBIAS to MICGND1 */ + regmap_update_bits(regmap, NAU8825_REG_MIC_BIAS, + NAU8825_MICBIAS_JKSLV | NAU8825_MICBIAS_JKR2, + NAU8825_MICBIAS_JKR2); + /* Attach SARADC to MICGND1 */ + regmap_update_bits(regmap, NAU8825_REG_SAR_CTRL, + NAU8825_SAR_INPUT_MASK, + NAU8825_SAR_INPUT_JKR2); + + snd_soc_dapm_force_enable_pin(dapm, "MICBIAS"); + snd_soc_dapm_force_enable_pin(dapm, "SAR"); + snd_soc_dapm_sync(dapm); + break; + case 2: + case 3: + dev_dbg(nau8825->dev, "CTIA (micgnd2) mic connected\n"); + type = SND_JACK_HEADSET; + + /* Unground MICGND2 */ + regmap_update_bits(regmap, NAU8825_REG_HSD_CTRL, 3 << 2, + 2 << 2); + /* Unground HPL/R */ + regmap_update_bits(regmap, NAU8825_REG_HSD_CTRL, 0x3, 0); + /* Attach 2kOhm Resistor from MICBIAS to MICGND2 */ + regmap_update_bits(regmap, NAU8825_REG_MIC_BIAS, + NAU8825_MICBIAS_JKSLV | NAU8825_MICBIAS_JKR2, + NAU8825_MICBIAS_JKSLV); + /* Attach SARADC to MICGND2 */ + regmap_update_bits(regmap, NAU8825_REG_SAR_CTRL, + NAU8825_SAR_INPUT_MASK, + NAU8825_SAR_INPUT_JKSLV); + + snd_soc_dapm_force_enable_pin(dapm, "MICBIAS"); + snd_soc_dapm_force_enable_pin(dapm, "SAR"); + snd_soc_dapm_sync(dapm); + break; + } + + return type; +} + +#define NAU8825_BUTTONS (SND_JACK_BTN_0 | SND_JACK_BTN_1 | \ + SND_JACK_BTN_2 | SND_JACK_BTN_3) + +static irqreturn_t nau8825_interrupt(int irq, void *data) +{ + struct nau8825 *nau8825 = (struct nau8825 *)data; + struct regmap *regmap = nau8825->regmap; + int active_irq, clear_irq = 0, event = 0, event_mask = 0; + + regmap_read(regmap, NAU8825_REG_IRQ_STATUS, &active_irq); + + if ((active_irq & NAU8825_JACK_EJECTION_IRQ_MASK) == + NAU8825_JACK_EJECTION_DETECTED) { + + nau8825_eject_jack(nau8825); + event_mask |= SND_JACK_HEADSET; + clear_irq = NAU8825_JACK_EJECTION_IRQ_MASK; + } else if (active_irq & NAU8825_KEY_SHORT_PRESS_IRQ) { + int key_status; + + regmap_read(regmap, NAU8825_REG_INT_CLR_KEY_STATUS, + &key_status); + + /* upper 8 bits of the register are for short pressed keys, + lower 8 bits - for long pressed buttons */ + nau8825->button_pressed = nau8825_button_decode( + key_status >> 8); + + event |= nau8825->button_pressed; + event_mask |= NAU8825_BUTTONS; + clear_irq = NAU8825_KEY_SHORT_PRESS_IRQ; + } else if (active_irq & NAU8825_KEY_RELEASE_IRQ) { + event_mask = NAU8825_BUTTONS; + clear_irq = NAU8825_KEY_RELEASE_IRQ; + } else if (active_irq & NAU8825_HEADSET_COMPLETION_IRQ) { + if (nau8825_is_jack_inserted(regmap)) { + event |= nau8825_jack_insert(nau8825); + } else { + dev_warn(nau8825->dev, "Headset completion IRQ fired but no headset connected\n"); + nau8825_eject_jack(nau8825); + } + + event_mask |= SND_JACK_HEADSET; + clear_irq = NAU8825_HEADSET_COMPLETION_IRQ; + } + + if (!clear_irq) + clear_irq = active_irq; + /* clears the rightmost interruption */ + regmap_write(regmap, NAU8825_REG_INT_CLR_KEY_STATUS, clear_irq); + + if (event_mask) + snd_soc_jack_report(nau8825->jack, event, event_mask); + + return IRQ_HANDLED; +} + +static void nau8825_setup_buttons(struct regmap *regmap) +{ + /* Setup Button Detect (Debounce, number of buttons, and Hysteresis) */ + regmap_write(regmap, NAU8825_REG_KEYDET_CTRL, 0x7311); + + /* Setup 4 buttons impedane according to Android specification + * https://source.android.com/accessories/headset-spec.html + * Button 0 - 0-70 Ohm + * Button 1 - 110-180 Ohm + * Button 2 - 210-290 Ohm + * Button 3 - 360-680 Ohm + */ + regmap_write(regmap, NAU8825_REG_VDET_THRESHOLD_1, 0x0f1f); + regmap_write(regmap, NAU8825_REG_VDET_THRESHOLD_2, 0x325f); +} + +static void nau8825_init_regs(struct nau8825 *nau8825) +{ + struct regmap *regmap = nau8825->regmap; + int jkdet_pullup_val; + + /* Power down DACs for power savings */ + regmap_write(regmap, NAU8825_REG_CHARGE_PUMP, 0x0300); + /* DAC Zero Crossing Enable */ + regmap_write(regmap, NAU8825_REG_MUTE_CTRL, 0x1000); + /* VMID Enable and Tieoff */ + regmap_write(regmap, NAU8825_REG_BIAS_ADJ, 0x0060); + /* Analog Bias Enable, Disable Boost Driver, + Automatic Short circuit protection enable */ + regmap_write(regmap, NAU8825_REG_BOOST, 0x3140); + /* Ground HP Outputs[1:0], + Enable Automatic Mic/Gnd switching reading on insert interrupt[6] */ + regmap_write(regmap, NAU8825_REG_HSD_CTRL, 0x004f); + + jkdet_pullup_val = nau8825->jkdet_pullup ? + NAU8825_JKDET_PULL_SELECT : 0; + regmap_update_bits(regmap, NAU8825_REG_GPIO12_CTRL, + NAU8825_JKDET_PULL_SELECT, jkdet_pullup_val); + + regmap_write(regmap, NAU8825_REG_JACK_DET_CTRL, 0x01e0); + /* IRQ Output Enable, Mask Insert Interrupt */ + regmap_write(regmap, NAU8825_REG_INTERRUPT_MASK, 0x0801); + + /* Setup SAR ADC */ + regmap_write(regmap, NAU8825_REG_SAR_CTRL, 0x0280); + nau8825_setup_buttons(regmap); + + /* Setup ADC x128 OSR */ + regmap_write(regmap, NAU8825_REG_ADC_RATE, 0x0002); + /* Setup DAC x128 OSR */ + regmap_write(regmap, NAU8825_REG_DAC_CTRL1, 0x0082); + /* DAC bias settings */ + regmap_write(regmap, NAU8825_REG_ANALOG_CONTROL_2, 0x1003); + /* ADC Bias Settings */ + regmap_write(regmap, NAU8825_REG_ANALOG_ADC_2, 0x0260); + /* Maximize Jack Insert Debounce */ + regmap_write(regmap, NAU8825_REG_JACK_DET_CTRL, 0x00e0); + + /* Setup clocks */ + regmap_write(regmap, NAU8825_REG_ENA_CTRL, 0x0416); + + /* Mask jack insert interruption */ + regmap_write(regmap, NAU8825_REG_INTERRUPT_DIS_CTRL, 0x0011); +} + +static const struct regmap_config nau8825_regmap_config = { + .val_bits = 16, + .reg_bits = 16, + + .max_register = NAU8825_REG_MAX, + .readable_reg = nau8825_readable_reg, + .writeable_reg = nau8825_writeable_reg, + .volatile_reg = nau8825_volatile_reg, + + .cache_type = REGCACHE_RBTREE, + .reg_defaults = nau8825_reg_defaults, + .num_reg_defaults = ARRAY_SIZE(nau8825_reg_defaults), +}; + +static int nau8825_codec_probe(struct snd_soc_codec *codec) +{ + struct nau8825 *nau8825 = snd_soc_codec_get_drvdata(codec); + + nau8825->dapm = &codec->dapm; + + /* The interrupt clock is gated by x1[10:8], + * one of them needs to be enabled all the time for + * interrupts to happen. */ + snd_soc_dapm_force_enable_pin(&codec->dapm, "DDACR"); + snd_soc_dapm_sync(&codec->dapm); + + /* Chip needs one FSCLK cycle in order to generate interrupts, + * as we cannot guarantee one will be provided by the system. Turning + * master mode on then off enables us to generate that FSCLK cycle + * with a minimum of contention on the clock bus. + * Enables master mode and correctly divides BCLK and FSCLK from MCLK. + */ + regmap_write(nau8825->regmap, NAU8825_REG_I2S_PCM_CTRL2, 0x2019); + regmap_write(nau8825->regmap, NAU8825_REG_I2S_PCM_CTRL2, 0x0010); + + nau8825_restart_jack_detection(nau8825->regmap); + + return 0; +} + +static struct snd_soc_codec_driver nau8825_codec_driver = { + .probe = nau8825_codec_probe, + + .controls = nau8825_snd_controls, + .num_controls = ARRAY_SIZE(nau8825_snd_controls), + .dapm_widgets = nau8825_dapm_widgets, + .num_dapm_widgets = ARRAY_SIZE(nau8825_dapm_widgets), + .dapm_routes = nau8825_dapm_routes, + .num_dapm_routes = ARRAY_SIZE(nau8825_dapm_routes), +}; + +static void nau8825_reset_chip(struct regmap *regmap) +{ + regmap_write(regmap, NAU8825_REG_RESET, 0x00); + regmap_write(regmap, NAU8825_REG_RESET, 0x00); +} + +static int nau8825_i2c_probe(struct i2c_client *i2c, + const struct i2c_device_id *id) +{ + struct device *dev = &i2c->dev; + struct nau8825 *nau8825; + int ret, value; + + nau8825 = devm_kzalloc(dev, sizeof(*nau8825), GFP_KERNEL); + if (!nau8825) + return -ENOMEM; + + i2c_set_clientdata(i2c, nau8825); + + nau8825->regmap = devm_regmap_init_i2c(i2c, &nau8825_regmap_config); + if (IS_ERR(nau8825->regmap)) + return PTR_ERR(nau8825->regmap); + nau8825->irq = i2c->irq; + nau8825->dev = dev; + + nau8825->jkdet_pullup = device_property_read_bool(dev, + "nuvoton,jkdet-pullup"); + + nau8825_reset_chip(nau8825->regmap); + ret = regmap_read(nau8825->regmap, NAU8825_REG_I2C_DEVICE_ID, &value); + if (ret < 0) { + dev_err(dev, "Failed to read device id from the NAU8825: %d\n", + ret); + return ret; + } + if ((value & NAU8825_SOFTWARE_ID_MASK) != + NAU8825_SOFTWARE_ID_NAU8825) { + dev_err(dev, "Not a NAU8825 chip\n"); + return -ENODEV; + } + + snd_soc_register_codec(&i2c->dev, &nau8825_codec_driver, + &nau8825_dai, 1); + + nau8825_init_regs(nau8825); + + if (nau8825->irq) { + int ret = devm_request_threaded_irq(dev, nau8825->irq, NULL, + nau8825_interrupt, IRQF_TRIGGER_LOW | IRQF_ONESHOT, + "nau8825", nau8825); + + if (ret) { + dev_err(dev, "Cannot request irq %d (%d)\n", + nau8825->irq, ret); + return ret; + } + } + + return 0; +} + +static int nau8825_i2c_remove(struct i2c_client *client) +{ + snd_soc_unregister_codec(&client->dev); + return 0; +} + +static const struct i2c_device_id nau8825_i2c_ids[] = { + { "nau8825", 0 }, + { } +}; +MODULE_DEVICE_TABLE(i2c, nau8825_i2c_ids); + +static struct i2c_driver nau8825_driver = { + .driver = { + .name = "nau8825", + .owner = THIS_MODULE, + }, + .probe = nau8825_i2c_probe, + .remove = nau8825_i2c_remove, + .id_table = nau8825_i2c_ids, +}; +module_i2c_driver(nau8825_driver); + +MODULE_DESCRIPTION("ASoC nau8825 driver"); +MODULE_AUTHOR("Anatol Pomozov <anatol(a)chromium.org>"); +MODULE_LICENSE("GPL"); diff --git a/sound/soc/codecs/nau8825.h b/sound/soc/codecs/nau8825.h new file mode 100644 index 0000000..4516d64 --- /dev/null +++ b/sound/soc/codecs/nau8825.h @@ -0,0 +1,262 @@ +/* + * NAU8825 ALSA SoC audio driver + * + * Copyright 2015 Google Inc. + * Author: Anatol Pomozov <anatol.pomozov(a)chrominium.org> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __NAU8825_H__ +#define __NAU8825_H__ + +#define NAU8825_REG_RESET 0x00 +#define NAU8825_REG_ENA_CTRL 0x01 +#define NAU8825_REG_CLK_DIVIDER 0x03 +#define NAU8825_REG_FLL1 0x04 +#define NAU8825_REG_FLL2 0x05 +#define NAU8825_REG_FLL3 0x06 +#define NAU8825_REG_FLL4 0x07 +#define NAU8825_REG_FLL5 0x08 +#define NAU8825_REG_FLL6 0x09 +#define NAU8825_REG_FLL_VCO_RSV 0x0a +#define NAU8825_REG_HSD_CTRL 0x0c +#define NAU8825_REG_JACK_DET_CTRL 0x0d +#define NAU8825_REG_INTERRUPT_MASK 0x0f +#define NAU8825_REG_IRQ_STATUS 0x10 +#define NAU8825_REG_INT_CLR_KEY_STATUS 0x11 +#define NAU8825_REG_INTERRUPT_DIS_CTRL 0x12 +#define NAU8825_REG_SAR_CTRL 0x13 +#define NAU8825_REG_KEYDET_CTRL 0x14 +#define NAU8825_REG_VDET_THRESHOLD_1 0x15 +#define NAU8825_REG_VDET_THRESHOLD_2 0x16 +#define NAU8825_REG_VDET_THRESHOLD_3 0x17 +#define NAU8825_REG_VDET_THRESHOLD_4 0x18 +#define NAU8825_REG_GPIO34_CTRL 0x19 +#define NAU8825_REG_GPIO12_CTRL 0x1a +#define NAU8825_REG_TDM_CTRL 0x1b +#define NAU8825_REG_I2S_PCM_CTRL1 0x1c +#define NAU8825_REG_I2S_PCM_CTRL2 0x1d +#define NAU8825_REG_LEFT_TIME_SLOT 0x1e +#define NAU8825_REG_RIGHT_TIME_SLOT 0x1f +#define NAU8825_REG_BIQ_CTRL 0x20 +#define NAU8825_REG_BIQ_COF1 0x21 +#define NAU8825_REG_BIQ_COF2 0x22 +#define NAU8825_REG_BIQ_COF3 0x23 +#define NAU8825_REG_BIQ_COF4 0x24 +#define NAU8825_REG_BIQ_COF5 0x25 +#define NAU8825_REG_BIQ_COF6 0x26 +#define NAU8825_REG_BIQ_COF7 0x27 +#define NAU8825_REG_BIQ_COF8 0x28 +#define NAU8825_REG_BIQ_COF9 0x29 +#define NAU8825_REG_BIQ_COF10 0x2a +#define NAU8825_REG_ADC_RATE 0x2b +#define NAU8825_REG_DAC_CTRL1 0x2c +#define NAU8825_REG_DAC_CTRL2 0x2d +#define NAU8825_REG_DAC_DGAIN_CTRL 0x2f +#define NAU8825_REG_ADC_DGAIN_CTRL 0x30 +#define NAU8825_REG_MUTE_CTRL 0x31 +#define NAU8825_REG_HSVOL_CTRL 0x32 +#define NAU8825_REG_DACL_CTRL 0x33 +#define NAU8825_REG_DACR_CTRL 0x34 +#define NAU8825_REG_ADC_DRC_KNEE_IP12 0x38 +#define NAU8825_REG_ADC_DRC_KNEE_IP34 0x39 +#define NAU8825_REG_ADC_DRC_SLOPES 0x3a +#define NAU8825_REG_ADC_DRC_ATKDCY 0x3b +#define NAU8825_REG_DAC_DRC_KNEE_IP12 0x45 +#define NAU8825_REG_DAC_DRC_KNEE_IP34 0x46 +#define NAU8825_REG_DAC_DRC_SLOPES 0x47 +#define NAU8825_REG_DAC_DRC_ATKDCY 0x48 +#define NAU8825_REG_IMM_MODE_CTRL 0x4c +#define NAU8825_REG_IMM_RMS_L 0x4d +#define NAU8825_REG_IMM_RMS_R 0x4e +#define NAU8825_REG_CLASSG_CTRL 0x50 +#define NAU8825_REG_OPT_EFUSE_CTRL 0x51 +#define NAU8825_REG_MISC_CTRL 0x55 +#define NAU8825_REG_I2C_DEVICE_ID 0x58 +#define NAU8825_REG_SARDOUT_RAM_STATUS 0x59 +#define NAU8825_REG_BIAS_ADJ 0x66 +#define NAU8825_REG_TRIM_SETTINGS 0x68 +#define NAU8825_REG_ANALOG_CONTROL_1 0x69 +#define NAU8825_REG_ANALOG_CONTROL_2 0x6a +#define NAU8825_REG_ANALOG_ADC_1 0x71 +#define NAU8825_REG_ANALOG_ADC_2 0x72 +#define NAU8825_REG_RDAC 0x73 +#define NAU8825_REG_MIC_BIAS 0x74 +#define NAU8825_REG_BOOST 0x76 +#define NAU8825_REG_FEPGA 0x77 +#define NAU8825_REG_POWER_UP_CONTROL 0x7f +#define NAU8825_REG_CHARGE_PUMP 0x80 +#define NAU8825_REG_CHARGE_PUMP_INPUT_READ 0x81 +#define NAU8825_REG_GENERAL_STATUS 0x82 +#define NAU8825_REG_MAX NAU8825_REG_GENERAL_STATUS + +/* ENA_CTRL (0x1) */ +#define NAU8825_ENABLE_DACR_SFT 10 +#define NAU8825_ENABLE_DACL_SFT 9 +#define NAU8825_ENABLE_ADC_SFT 8 +#define NAU8825_ENABLE_SAR_SFT 1 + +/* CLK_DIVIDER (0x3) */ +#define NAU8825_CLK_SRC_SFT 15 +#define NAU8825_CLK_SRC_MASK (1 << NAU8825_CLK_SRC_SFT) +#define NAU8825_CLK_SRC_VCO (1 << NAU8825_CLK_SRC_SFT) +#define NAU8825_CLK_SRC_MCLK (0 << NAU8825_CLK_SRC_SFT) + +/* HSD_CTRL (0xc) */ +#define NAU8825_HSD_AUTO_MODE (1 << 6) +#define NAU8825_SPKR_DWN1R_SHORT (1 << 1) +#define NAU8825_SPKR_DWN1L_SHORT (1 << 0) + +/* JACK_DET_CTRL (0xd) */ +#define NAU8825_JACK_DET_RESTART (1 << 9) + +/* IRQ_STATUS (0x10) */ +#define NAU8825_HEADSET_COMPLETION_IRQ (1 << 10) +#define NAU8825_SHORT_CIRCUIT_IRQ (1 << 9) +#define NAU8825_IMPEDANCE_MEAS_IRQ (1 << 8) +#define NAU8825_KEY_IRQ_MASK (0x7 << 5) +#define NAU8825_KEY_RELEASE_IRQ (1 << 7) +#define NAU8825_KEY_LONG_PRESS_IRQ (1 << 6) +#define NAU8825_KEY_SHORT_PRESS_IRQ (1 << 5) +#define NAU8825_MIC_DETECTION_IRQ (1 << 4) +#define NAU8825_JACK_EJECTION_IRQ_MASK (3 << 2) +#define NAU8825_JACK_EJECTION_DETECTED (1 << 2) +#define NAU8825_JACK_INSERTION_IRQ_MASK (3 << 0) +#define NAU8825_JACK_INSERTION_DETECTED (1 << 0) + +/* SAR_CTRL (0x13) */ +#define NAU8825_SAR_ADC_EN_SFT 12 +#define NAU8825_SAR_ADC_EN (1 << NAU8825_SAR_ADC_EN_SFT) +#define NAU8825_SAR_INPUT_MASK (1 << 11) +#define NAU8825_SAR_INPUT_JKSLV (1 << 11) +#define NAU8825_SAR_INPUT_JKR2 (0 << 11) + +/* KEYDET_CTRL (0x14) */ +#define NAU8825_KEYDET_LEVELS_NR_SFT 8 +#define NAU8825_KEYDET_LEVELS_NR_MASK (0x7 << 8) + +/* GPIO12_CTRL (0x1a) */ +/* 0 - pull down, 1 - pull up */ +#define NAU8825_JKDET_PULL_SELECT (1 << 11) + +/* I2S_PCM_CTRL1 (0x1c) */ +#define NAU8825_I2S_BP_SFT 7 +#define NAU8825_I2S_BP_MASK (1 << NAU8825_I2S_BP_SFT) +#define NAU8825_I2S_BP_INV (1 << NAU8825_I2S_BP_SFT) +#define NAU8825_I2S_PCMB_SFT 6 +#define NAU8825_I2S_PCMB_MASK (1 << NAU8825_I2S_PCMB_SFT) +#define NAU8825_I2S_PCMB_EN (1 << NAU8825_I2S_PCMB_SFT) +#define NAU8825_I2S_DL_SFT 2 +#define NAU8825_I2S_DL_MASK (0x3 << NAU8825_I2S_DL_SFT) +#define NAU8825_I2S_DL_16 (0 << NAU8825_I2S_DL_SFT) +#define NAU8825_I2S_DL_20 (1 << NAU8825_I2S_DL_SFT) +#define NAU8825_I2S_DL_24 (2 << NAU8825_I2S_DL_SFT) +#define NAU8825_I2S_DL_32 (3 << NAU8825_I2S_DL_SFT) +#define NAU8825_I2S_DF_SFT 0 +#define NAU8825_I2S_DF_MASK (0x3 << NAU8825_I2S_DF_SFT) +#define NAU8825_I2S_DF_RIGTH (0 << NAU8825_I2S_DF_SFT) +#define NAU8825_I2S_DF_LEFT (1 << NAU8825_I2S_DF_SFT) +#define NAU8825_I2S_DF_I2S (2 << NAU8825_I2S_DF_SFT) +#define NAU8825_I2S_DF_PCM_AB (3 << NAU8825_I2S_DF_SFT) + +/* I2S_PCM_CTRL2 (0x1d) */ +#define NAU8825_I2S_MS_SFT 3 +#define NAU8825_I2S_MS_MASK (1 << NAU8825_I2S_MS_SFT) +#define NAU8825_I2S_MS_MASTER (1 << NAU8825_I2S_MS_SFT) +#define NAU8825_I2S_MS_SLAVE (0 << NAU8825_I2S_MS_SFT) + +/* ADC_RATE (0x2b) */ +#define NAU8825_ADC_SINC4 (1 << 4) +#define NAU8825_ADC_SINC_DOWN_MASK 3 +#define NAU8825_ADC_SINC_DOWN_32 0 +#define NAU8825_ADC_SINC_DOWN_64 1 +#define NAU8825_ADC_SINC_DOWN_128 2 +#define NAU8825_ADC_SINC_DOWN_256 3 + +/* DAC_CTRL1 (0x2c) */ +#define NAU8825_DAC_CLIP_OFF (1 << 7) +#define NAU8825_DAC_OVERSAMPLE_MASK 7 +#define NAU8825_DAC_OVERSAMPLE_64 0 +#define NAU8825_DAC_OVERSAMPLE_256 1 +#define NAU8825_DAC_OVERSAMPLE_128 2 +#define NAU8825_DAC_OVERSAMPLE_32 4 + +/* MUTE_CTRL (0x31) */ +#define NAU8825_DAC_ZERO_CROSSING_EN (1 << 9) +#define NAU8825_DAC_SOFT_MUTE (1 << 9) + +/* HSVOL_CTRL (0x32) */ +#define NAU8825_HP_MUTE (1 << 15) + +/* DACL_CTRL (0x33) */ +#define NAU8825_DACL_CH_SEL_SFT 9 + +/* DACR_CTRL (0x34) */ +#define NAU8825_DACR_CH_SEL_SFT 9 + +/* I2C_DEVICE_ID (0x58) */ +#define NAU8825_GPIO2JD1 (1 << 7) +#define NAU8825_SOFTWARE_ID_MASK 0x3 +#define NAU8825_SOFTWARE_ID_NAU8825 0x0 + +/* BIAS_ADJ (0x66) */ +#define NAU8825_BIAS_VMID (1 << 6) +#define NAU8825_BIAS_VMID_SEL_MASK (3 << 4) +#define NAU8825_BIAS_VMID_SEL_OPEN (0 << 4) +#define NAU8825_BIAS_VMID_SEL_25KOHM (1 << 4) +#define NAU8825_BIAS_VMID_SEL_125KOHM (2 << 4) +#define NAU8825_BIAS_VMID_SEL_2_5KOHM (3 << 4) + +/* ANALOG_CONTROL_2 (0x6a) */ +#define NAU8825_HP_NON_CLASSG_CURRENT_2xADJ (1 << 12) +#define NAU8825_DAC_CAPACITOR_MSB (1 << 1) +#define NAU8825_DAC_CAPACITOR_LSB (1 << 0) + +/* ANALOG_ADC_2 (0x72) */ +#define NAU8825_ADC_VREFSEL_MASK (0x3 << 8) +#define NAU8825_ADC_VREFSEL_ANALOG (0 << 8) +#define NAU8825_ADC_VREFSEL_VMID (1 << 8) +#define NAU8825_ADC_VREFSEL_VMID_PLUS_0_5DB (2 << 8) +#define NAU8825_ADC_VREFSEL_VMID_PLUS_1DB (3 << 8) +#define NAU8825_POWERUP_ADCL (1 << 6) + +/* MIC_BIAS (0x74) */ +#define NAU8825_MICBIAS_JKSLV (1 << 14) +#define NAU8825_MICBIAS_JKR2 (1 << 12) +#define NAU8825_MICBIAS_POWERUP_SFT 8 + +/* BOOST (0x76) */ +#define NAU8825_PRECHARGE_DIS (1 << 13) +#define NAU8825_GLOBAL_BIAS_EN (1 << 12) +#define NAU8825_HP_BOOST_DIS (1 << 12) +#define NAU8825_SHORT_SHUTDOWN_EN (1 << 6) + +/* POWER_UP_CONTROL (0x7f) */ +#define NAU8825_POWERUP_HP_DRV_L (1 << 0) +#define NAU8825_POWERUP_HP_DRV_R (1 << 1) +#define NAU8825_POWERUP_DRV_IN_L (1 << 2) +#define NAU8825_POWERUP_DRV_IN_R (1 << 3) +#define NAU8825_POWERUP_INTEGR_L (1 << 4) +#define NAU8825_POWERUP_INTEGR_R (1 << 5) + +/* CHARGE_PUMP_AND_POWER_DOWN_CONTROL (0x80) */ +#define NAU8825_JAMNODCLOW (1 << 10) +#define NAU8825_POWER_DOWN_DACR (1 << 9) +#define NAU8825_POWER_DOWN_DACL (1 << 8) +#define NAU8825_CHANRGE_PUMP_EN (1 << 5) + + +/* System Clock Source */ +enum { + NAU8825_CLK_MCLK = 0, + NAU8825_CLK_INTERNAL, +}; + +int nau8825_enable_jack_detect(struct snd_soc_codec *codec, + struct snd_soc_jack *jack); + + +#endif /* __NAU8825_H__ */ -- 2.5.0

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