June 2013 - Alsa-devel - mailman.alsa-project.org

[alsa-devel] [PATCH V2] ASoC: rt5640: add device tree support
by Stephen Warren 12 Jun '13

12 Jun '13

From: Stephen Warren <swarren(a)nvidia.com> Modify the RT5640 driver to parse platform data from device tree. Write a DT binding document to describe those properties. Slight re-ordering of rt5640_i2c_probe() to better fit the DT parsing. Since ldo1_en is optional, guard usage of it with gpio_is_valid(), rather than open-coding an if (gpio) check. Signed-off-by: Stephen Warren <swarren(a)nvidia.com> --- v2: Treat ldo1_en==0 in pdata as an invalid (unspecified) GPIO. --- Documentation/devicetree/bindings/sound/rt5640.txt | 30 ++++++++++++++ sound/soc/codecs/rt5640.c | 48 +++++++++++++++++++--- 2 files changed, 72 insertions(+), 6 deletions(-) create mode 100644 Documentation/devicetree/bindings/sound/rt5640.txt diff --git a/Documentation/devicetree/bindings/sound/rt5640.txt b/Documentation/devicetree/bindings/sound/rt5640.txt new file mode 100644 index 0000000..005bcb2 --- /dev/null +++ b/Documentation/devicetree/bindings/sound/rt5640.txt @@ -0,0 +1,30 @@ +RT5640 audio CODEC + +This device supports I2C only. + +Required properties: + +- compatible : "realtek,rt5640". + +- reg : The I2C address of the device. + +- interrupts : The CODEC's interrupt output. + +Optional properties: + +- realtek,in1-differential +- realtek,in2-differential + Boolean. Indicate MIC1/2 input are differential, rather than single-ended. + +- realtek,ldo1-en-gpios : The GPIO that controls the CODEC's LDO1_EN pin. + +Example: + +rt5640 { + compatible = "realtek,rt5640"; + reg = <0x1c>; + interrupt-parent = <&gpio>; + interrupts = <TEGRA_GPIO(W, 3) GPIO_ACTIVE_HIGH>; + realtek,ldo1-en-gpios = + <&gpio TEGRA_GPIO(V, 3) GPIO_ACTIVE_HIGH>; +}; diff --git a/sound/soc/codecs/rt5640.c b/sound/soc/codecs/rt5640.c index 288c17c..8761552 100644 --- a/sound/soc/codecs/rt5640.c +++ b/sound/soc/codecs/rt5640.c @@ -18,6 +18,7 @@ #include <linux/gpio.h> #include <linux/i2c.h> #include <linux/regmap.h> +#include <linux/of_gpio.h> #include <linux/platform_device.h> #include <linux/spi/spi.h> #include <sound/core.h> @@ -1998,6 +1999,28 @@ static const struct i2c_device_id rt5640_i2c_id[] = { }; MODULE_DEVICE_TABLE(i2c, rt5640_i2c_id); +static int rt5640_parse_dt(struct rt5640_priv *rt5640, struct device_node *np) +{ + rt5640->pdata.in1_diff = of_property_read_bool(np, + "realtek,in1-differential"); + rt5640->pdata.in2_diff = of_property_read_bool(np, + "realtek,in2-differential"); + + rt5640->pdata.ldo1_en = of_get_named_gpio(np, + "realtek,ldo1-en-gpios", 0); + /* + * LDO1_EN is optional (it may be statically tied on the board). + * -ENOENT means that the property doesn't exist, i.e. there is no + * GPIO, so is not an error. Any other error code means the property + * exists, but could not be parsed. + */ + if (!gpio_is_valid(rt5640->pdata.ldo1_en) && + (rt5640->pdata.ldo1_en != -ENOENT)) + return rt5640->pdata.ldo1_en; + + return 0; +} + static int rt5640_i2c_probe(struct i2c_client *i2c, const struct i2c_device_id *id) { @@ -2011,6 +2034,24 @@ static int rt5640_i2c_probe(struct i2c_client *i2c, GFP_KERNEL); if (NULL == rt5640) return -ENOMEM; + i2c_set_clientdata(i2c, rt5640); + + if (pdata) { + rt5640->pdata = *pdata; + /* + * Translate zero'd out (default) pdata value to an invalid + * GPIO ID. This makes the pdata and DT paths consistent in + * terms of the value left in this field when no GPIO is + * specified, but means we can't actually use GPIO 0. + */ + if (!rt5640->pdata.ldo1_en) + rt5640->pdata.ldo1_en = -EINVAL; + } else if (i2c->dev.of_node) { + ret = rt5640_parse_dt(rt5640, i2c->dev.of_node); + if (ret) + return ret; + } else + rt5640->pdata.ldo1_en = -EINVAL; rt5640->regmap = devm_regmap_init_i2c(i2c, &rt5640_regmap); if (IS_ERR(rt5640->regmap)) { @@ -2020,12 +2061,7 @@ static int rt5640_i2c_probe(struct i2c_client *i2c, return ret; } - if (pdata) - rt5640->pdata = *pdata; - - i2c_set_clientdata(i2c, rt5640); - - if (rt5640->pdata.ldo1_en) { + if (gpio_is_valid(rt5640->pdata.ldo1_en)) { ret = devm_gpio_request_one(&i2c->dev, rt5640->pdata.ldo1_en, GPIOF_OUT_INIT_HIGH, "RT5640 LDO1_EN"); -- 1.8.1.5

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Re: [alsa-devel] [PATCH 1/3] mfd: arizona: Integrate wm8997 into Arizona mfd
by Mark Brown 12 Jun '13

12 Jun '13

On Wed, Jun 12, 2013 at 05:29:18PM +0100, Charles Keepax wrote: > The wm8997 is a compact, high-performance audio hub CODEC with SLIMbus > interfacing, for smartphones, tablets and other portable audio devices > based on the Arizona platform. > > This patch integrates the wm8997 into the Arizona mfd. There should be an update to add the OF device ID to the driver in here.

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[alsa-devel] [PATCH] ASoC: rt5640: add device tree support
by Stephen Warren 12 Jun '13

12 Jun '13

From: Stephen Warren <swarren(a)nvidia.com> Modify the RT5640 driver to parse platform data from device tree. Write a DT binding document to describe those properties. Slight re-ordering of rt5640_i2c_probe() to better fit the DT parsing. Since ldo1_en is optional, guard usage of it with gpio_is_valid(), rather than open-coding an if (gpio) check. Signed-off-by: Stephen Warren <swarren(a)nvidia.com> --- Mark, If the underlying rt5640 driver is reposted, this might need a new version to rebase it, but otherwise I believe should be complete. Bard, FYI you can find this patch and the DT changes for Dalmore at: git://nv-tegra.nvidia.com/user/swarren/linux-2.6 linux-next_common Documentation/devicetree/bindings/sound/rt5640.txt | 30 ++++++++++++++++ sound/soc/codecs/rt5640.c | 40 ++++++++++++++++++---- 2 files changed, 64 insertions(+), 6 deletions(-) create mode 100644 Documentation/devicetree/bindings/sound/rt5640.txt diff --git a/Documentation/devicetree/bindings/sound/rt5640.txt b/Documentation/devicetree/bindings/sound/rt5640.txt new file mode 100644 index 0000000..005bcb2 --- /dev/null +++ b/Documentation/devicetree/bindings/sound/rt5640.txt @@ -0,0 +1,30 @@ +RT5640 audio CODEC + +This device supports I2C only. + +Required properties: + +- compatible : "realtek,rt5640". + +- reg : The I2C address of the device. + +- interrupts : The CODEC's interrupt output. + +Optional properties: + +- realtek,in1-differential +- realtek,in2-differential + Boolean. Indicate MIC1/2 input are differential, rather than single-ended. + +- realtek,ldo1-en-gpios : The GPIO that controls the CODEC's LDO1_EN pin. + +Example: + +rt5640 { + compatible = "realtek,rt5640"; + reg = <0x1c>; + interrupt-parent = <&gpio>; + interrupts = <TEGRA_GPIO(W, 3) GPIO_ACTIVE_HIGH>; + realtek,ldo1-en-gpios = + <&gpio TEGRA_GPIO(V, 3) GPIO_ACTIVE_HIGH>; +}; diff --git a/sound/soc/codecs/rt5640.c b/sound/soc/codecs/rt5640.c index 288c17c..f7e73d2 100644 --- a/sound/soc/codecs/rt5640.c +++ b/sound/soc/codecs/rt5640.c @@ -18,6 +18,7 @@ #include <linux/gpio.h> #include <linux/i2c.h> #include <linux/regmap.h> +#include <linux/of_gpio.h> #include <linux/platform_device.h> #include <linux/spi/spi.h> #include <sound/core.h> @@ -1998,6 +1999,28 @@ static const struct i2c_device_id rt5640_i2c_id[] = { }; MODULE_DEVICE_TABLE(i2c, rt5640_i2c_id); +static int rt5640_parse_dt(struct rt5640_priv *rt5640, struct device_node *np) +{ + rt5640->pdata.in1_diff = of_property_read_bool(np, + "realtek,in1-differential"); + rt5640->pdata.in2_diff = of_property_read_bool(np, + "realtek,in2-differential"); + + rt5640->pdata.ldo1_en = of_get_named_gpio(np, + "realtek,ldo1-en-gpios", 0); + /* + * LDO1_EN is optional (it may be statically tied on the board). + * -ENOENT means that the property doesn't exist, i.e. there is no + * GPIO, so is not an error. Any other error code means the property + * exists, but could not be parsed. + */ + if (!gpio_is_valid(rt5640->pdata.ldo1_en) && + (rt5640->pdata.ldo1_en != -ENOENT)) + return rt5640->pdata.ldo1_en; + + return 0; +} + static int rt5640_i2c_probe(struct i2c_client *i2c, const struct i2c_device_id *id) { @@ -2011,6 +2034,16 @@ static int rt5640_i2c_probe(struct i2c_client *i2c, GFP_KERNEL); if (NULL == rt5640) return -ENOMEM; + i2c_set_clientdata(i2c, rt5640); + + if (pdata) + rt5640->pdata = *pdata; + else if (i2c->dev.of_node) { + ret = rt5640_parse_dt(rt5640, i2c->dev.of_node); + if (ret) + return ret; + } else + rt5640->pdata.ldo1_en = -1; rt5640->regmap = devm_regmap_init_i2c(i2c, &rt5640_regmap); if (IS_ERR(rt5640->regmap)) { @@ -2020,12 +2053,7 @@ static int rt5640_i2c_probe(struct i2c_client *i2c, return ret; } - if (pdata) - rt5640->pdata = *pdata; - - i2c_set_clientdata(i2c, rt5640); - - if (rt5640->pdata.ldo1_en) { + if (gpio_is_valid(rt5640->pdata.ldo1_en)) { ret = devm_gpio_request_one(&i2c->dev, rt5640->pdata.ldo1_en, GPIOF_OUT_INIT_HIGH, "RT5640 LDO1_EN"); -- 1.8.1.5

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Re: [alsa-devel] [PATCH] ASoC: add RT5640 CODEC driver
by Mark Brown 12 Jun '13

12 Jun '13

On Tue, Jun 11, 2013 at 01:10:16PM +0800, bardliao(a)realtek.com wrote: > From: Bard Liao <bardliao(a)realtek.com> > > This patch adds the ALC5640 codec driver. I'll apply this on the basis that there's going to be some followup patches fixing the outstanding issues.

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Re: [alsa-devel] [PATCH v2] sound/sgtl5000: fix codec register initial values and mask
by Fabio Estevam 12 Jun '13

12 Jun '13

On 06/11/2013 12:22 PM, Oskar Schirmer wrote: > According to documentation bit 3:2 in register SSS_CTRL are > reserved and zero, so initially setting the register to 0x0008 > does not make much sense. Instead, bit 4 should be marked set, > as this is the power up default. > > Further, mask computation in declarative part is obviously wrong: > Fix FRAC DIVISOR to provide an 11 bit mask correctly. > > Signed-off-by: Oskar Schirmer <oskar(a)scara.com> > Tested-by: Fabio Estevam <fabio.estevam(a)freescale.com> Looks good, but please copy Mark Brown. Just added him in Cc now. > --- > sound/soc/codecs/sgtl5000.c | 2 +- > sound/soc/codecs/sgtl5000.h | 2 +- > 2 files changed, 2 insertions(+), 2 deletions(-) > > diff --git a/sound/soc/codecs/sgtl5000.c b/sound/soc/codecs/sgtl5000.c > index d441559..10092ba 100644 > --- a/sound/soc/codecs/sgtl5000.c > +++ b/sound/soc/codecs/sgtl5000.c > @@ -38,7 +38,7 @@ > static const struct reg_default sgtl5000_reg_defaults[] = { > { SGTL5000_CHIP_CLK_CTRL, 0x0008 }, > { SGTL5000_CHIP_I2S_CTRL, 0x0010 }, > - { SGTL5000_CHIP_SSS_CTRL, 0x0008 }, > + { SGTL5000_CHIP_SSS_CTRL, 0x0010 }, > { SGTL5000_CHIP_DAC_VOL, 0x3c3c }, > { SGTL5000_CHIP_PAD_STRENGTH, 0x015f }, > { SGTL5000_CHIP_ANA_HP_CTRL, 0x1818 }, > diff --git a/sound/soc/codecs/sgtl5000.h b/sound/soc/codecs/sgtl5000.h > index 4b69229..52bd843 100644 > --- a/sound/soc/codecs/sgtl5000.h > +++ b/sound/soc/codecs/sgtl5000.h > @@ -347,7 +347,7 @@ > #define SGTL5000_PLL_INT_DIV_MASK 0xf800 > #define SGTL5000_PLL_INT_DIV_SHIFT 11 > #define SGTL5000_PLL_INT_DIV_WIDTH 5 > -#define SGTL5000_PLL_FRAC_DIV_MASK 0x0700 > +#define SGTL5000_PLL_FRAC_DIV_MASK 0x07ff > #define SGTL5000_PLL_FRAC_DIV_SHIFT 0 > #define SGTL5000_PLL_FRAC_DIV_WIDTH 11 > >

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[alsa-devel] [PATCH 0/3] DMA fixes for ux500 ASoC driver
by Fabio Baltieri 12 Jun '13

12 Jun '13

Hi Mark, The DMA driver used on ux500 has been recently reworked to make it device-tree capable, but the rework required to drop some "features", such as opportunistic channel allocation and hardcoded addresses, that the ASoC driver was relying upon. This series fixes the audio driver to make it work with the current dma40 implementation, and works fine even when booting with device-tree. Would you consider merging these for asoc/topic/ux500? Thanks, Fabio Fabio Baltieri (3): ASoC: ux500: Move DMA parameters into ux500_msp ASoC: ux500: Set DMA address during device init ASoC: ux500: Add DMA slave config prepare routine sound/soc/ux500/ux500_msp_dai.c | 11 ++++------- sound/soc/ux500/ux500_msp_dai.h | 2 -- sound/soc/ux500/ux500_msp_i2s.c | 13 +++++++++---- sound/soc/ux500/ux500_msp_i2s.h | 15 ++++++++------- sound/soc/ux500/ux500_pcm.c | 30 ++++++++++++++++++++++++++++++ 5 files changed, 51 insertions(+), 20 deletions(-) -- 1.8.2

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Re: [alsa-devel] [PATCH] ASoC: add RT5640 CODEC driver
by Stephen Warren 12 Jun '13

12 Jun '13

On 06/10/2013 11:10 PM, bardliao(a)realtek.com wrote: > From: Bard Liao <bardliao(a)realtek.com> > > This patch adds the ALC5640 codec driver. > diff --git a/sound/soc/codecs/rt5640.c b/sound/soc/codecs/rt5640.c > +static int rt5640_i2c_probe(struct i2c_client *i2c, > + rt5640->regmap = devm_regmap_init_i2c(i2c, &rt5640_regmap); > + if (rt5640->pdata.ldo1_en) { > + ret = devm_gpio_request_one(&i2c->dev, rt5640->pdata.ldo1_en, > + GPIOF_OUT_INIT_HIGH, > + "RT5640 LDO1_EN"); > + if (ret < 0) { > + dev_err(&i2c->dev, "Failed to request LDO1_EN %d: %d\n", > + rt5640->pdata.ldo1_en, ret); > + return ret; > + } > + msleep(400); > + } Oh I see this is the only place ldo1_en is touched. I had assumed you were going to add code to turn it off/on based on bias level. That's why I had asked you to add that feature, since you'd know any HW requirements for doing that. Still, as Mark mentioned, that can certainly be added later. One question though: Don't you want to initially enable ldo1_en before you create the regmap? At least some regmap_init() calls end up trying to read from the device to populate the register cache, and that won't work until ldo1_en is active. Anyway, I'll go test this again, and work on the patch to pull the platform data from DT.

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[alsa-devel] [PATCH V6 0/6] clk: Samsung: audss: Register audio subsytem clocks using common clk framework
by Padmavathi Venna 12 Jun '13

12 Jun '13

Samsung S5PV210 and Exynos SoC has a separate subsystem for audio. This subsystem has a internal clock controller which controls i2s0 and pcm0 clocks. This patch series adds the Samsung audio subsytem clock to the common clock framework and provides the I2S controllers clock information in the dtsi file. This patch series is made based on Kukjin Kim for-next branch Changes since V5: - Added i2s_opclk0 entry for i2s1 and i2s2 nodes - Added Acked-by: Mike Turquette <mturquette(a)linaro.org> - Added Reviewed-by: Doug Anderson <dianders(a)chromium.org> Changes since V4: - Reworked on the nits given by Doug. - Removed mout_audss and mout_i2s from i2s nodes as we are not getting these clocks in the i2s driver. - Modified the I2S binding documentation for clocks and pinmux. Changes since V3: - Replaced samsung with exynos in the macro prefixes and function names as this driver supports mainly exynos and s5p family. - Added Reviewed-by:Sylwester Nawrocki <s.nawrocki(a)samsung.com> Changes since V2: - Removed s5pv210 compatible name from driver as it is not yet supported which is different from Exynos series audio subsystem clock conroller. - Removed clkdev lookup support and added alias names in the i2s0 controller node. Changes since V1: - Reworked on all review comments by Sylwester Nawrocki - Added a header file for all clock indexes as requested by Sylwester - Added different compatible names for s5pv210, exynos4 and exynos5 - Registered the pcm clocks with common clock framework Padmavathi Venna (6): ARM: samsung: use #include for all device trees clk: samsung: register audio subsystem clocks using common clock framework ARM: dts: add Exynos audio subsystem clock controller node ARM: dts: add clock provider information for i2s controllers in Exynos5250 ARM: dts: Update Samsung I2S documentation clk: exynos5250: Add enum entries for divider clock of i2s1 and i2s2 .../devicetree/bindings/clock/clk-exynos-audss.txt | 64 ++++++++++ .../devicetree/bindings/sound/samsung-i2s.txt | 46 +++---- arch/arm/boot/dts/exynos4.dtsi | 2 +- arch/arm/boot/dts/exynos4210-origen.dts | 2 +- arch/arm/boot/dts/exynos4210-smdkv310.dts | 2 +- arch/arm/boot/dts/exynos4210-trats.dts | 2 +- arch/arm/boot/dts/exynos4210-universal_c210.dts | 2 +- arch/arm/boot/dts/exynos4210.dtsi | 4 +- arch/arm/boot/dts/exynos4212.dtsi | 2 +- arch/arm/boot/dts/exynos4412-odroidx.dts | 2 +- arch/arm/boot/dts/exynos4412-origen.dts | 2 +- arch/arm/boot/dts/exynos4412-smdk4412.dts | 2 +- arch/arm/boot/dts/exynos4412.dtsi | 2 +- arch/arm/boot/dts/exynos4x12.dtsi | 4 +- arch/arm/boot/dts/exynos5250-arndale.dts | 2 +- arch/arm/boot/dts/exynos5250-smdk5250.dts | 2 +- arch/arm/boot/dts/exynos5250-snow.dts | 4 +- arch/arm/boot/dts/exynos5250.dtsi | 20 +++- arch/arm/boot/dts/exynos5440-sd5v1.dts | 2 +- arch/arm/boot/dts/exynos5440-ssdk5440.dts | 2 +- arch/arm/boot/dts/exynos5440.dtsi | 2 +- arch/arm/boot/dts/s3c2416-smdk2416.dts | 2 +- arch/arm/boot/dts/s3c2416.dtsi | 4 +- arch/arm/boot/dts/s3c24xx.dtsi | 2 +- drivers/clk/samsung/Makefile | 1 + drivers/clk/samsung/clk-exynos-audss.c | 133 ++++++++++++++++++++ drivers/clk/samsung/clk-exynos5250.c | 5 +- include/dt-bindings/clk/exynos-audss-clk.h | 25 ++++ 28 files changed, 288 insertions(+), 56 deletions(-) create mode 100644 Documentation/devicetree/bindings/clock/clk-exynos-audss.txt create mode 100644 drivers/clk/samsung/clk-exynos-audss.c create mode 100644 include/dt-bindings/clk/exynos-audss-clk.h -- 1.7.4.4

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Re: [alsa-devel] [PATCH] ASoC: add RT5640 CODEC driver
by Mark Brown 12 Jun '13

12 Jun '13

On Tue, Jun 11, 2013 at 01:10:16PM +0800, bardliao(a)realtek.com wrote: > Signed-off-by: Bard Liao <bardliao(a)realtek.com> > Signed-off-by: Stephen Warren <swarren(a)nvidia.com> I don't think that signoff for Stephen is right... > +static int rt5640_set_bias_level(struct snd_soc_codec *codec, > + enum snd_soc_bias_level level) > +{ > + struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec); > + switch (level) { > + case SND_SOC_BIAS_STANDBY: > + if (SND_SOC_BIAS_OFF == codec->dapm.bias_level) { > + regcache_cache_only(rt5640->regmap, false); You mark the device cache only in suspend so for symmetry this should really be in _BIAS_OFF, especially since the device is idle_bias_off so it'll be able to power off without a full suspend. > + if (rt5640->pdata.ldo1_en) { > + ret = devm_gpio_request_one(&i2c->dev, rt5640->pdata.ldo1_en, > + GPIOF_OUT_INIT_HIGH, > + "RT5640 LDO1_EN"); > + if (ret < 0) { > + dev_err(&i2c->dev, "Failed to request LDO1_EN %d: %d\n", > + rt5640->pdata.ldo1_en, ret); > + return ret; > + } > + msleep(400); > + } I'd expect to see some handling fo the LDO over suspend but that can be dealt with in a followup as previously discussed. Ideally we'd be able to power off when in _BIAS_OFF too but if it's going to take 400ms to ramp the LDO (which does seem high) that might be an issue.

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Re: [alsa-devel] [PATCH V5 2/5] clk: samsung: register audio subsystem clocks using common clock framework
by Padma Venkat 12 Jun '13

12 Jun '13

Hi Mike, On Wed, Jun 12, 2013 at 3:43 AM, Mike Turquette <mturquette(a)linaro.org> wrote: > Quoting Padmavathi Venna (2013-06-04 05:28:07) >> Audio subsystem is introduced in s5pv210 and exynos platforms. >> This has seperate clock controller which can control i2s0 and >> pcm0 clocks. This patch registers the audio subsystem clocks >> with the common clock framework on Exynos family. >> >> Signed-off-by: Padmavathi Venna <padma.v(a)samsung.com> >> Reviewed-by: Sylwester Nawrocki <s.nawrocki(a)samsung.com> > > This looks good to me. You have my Ack, or I can take this patch > through clk-next. Let me know what works for you. I have to rework for one small change in one of the patch in the set. So I will do that and put your ack and will repost the patches. After that you can take the patches through clk-next. Thanks Padma > > Regards, > Mike > >> --- >> .../devicetree/bindings/clock/clk-exynos-audss.txt | 64 ++++++++++ >> drivers/clk/samsung/Makefile | 1 + >> drivers/clk/samsung/clk-exynos-audss.c | 133 ++++++++++++++++++++ >> include/dt-bindings/clk/exynos-audss-clk.h | 25 ++++ >> 4 files changed, 223 insertions(+), 0 deletions(-) >> create mode 100644 Documentation/devicetree/bindings/clock/clk-exynos-audss.txt >> create mode 100644 drivers/clk/samsung/clk-exynos-audss.c >> create mode 100644 include/dt-bindings/clk/exynos-audss-clk.h >> >> diff --git a/Documentation/devicetree/bindings/clock/clk-exynos-audss.txt b/Documentation/devicetree/bindings/clock/clk-exynos-audss.txt >> new file mode 100644 >> index 0000000..a120180 >> --- /dev/null >> +++ b/Documentation/devicetree/bindings/clock/clk-exynos-audss.txt >> @@ -0,0 +1,64 @@ >> +* Samsung Audio Subsystem Clock Controller >> + >> +The Samsung Audio Subsystem clock controller generates and supplies clocks >> +to Audio Subsystem block available in the S5PV210 and Exynos SoCs. The clock >> +binding described here is applicable to all SoC's in Exynos family. >> + >> +Required Properties: >> + >> +- compatible: should be one of the following: >> + - "samsung,exynos4210-audss-clock" - controller compatible with all Exynos4 SoCs. >> + - "samsung,exynos5250-audss-clock" - controller compatible with all Exynos5 SoCs. >> + >> +- reg: physical base address and length of the controller's register set. >> + >> +- #clock-cells: should be 1. >> + >> +The following is the list of clocks generated by the controller. Each clock is >> +assigned an identifier and client nodes use this identifier to specify the >> +clock which they consume. Some of the clocks are available only on a particular >> +Exynos4 SoC and this is specified where applicable. >> + >> +Provided clocks: >> + >> +Clock ID SoC (if specific) >> +----------------------------------------------- >> + >> +mout_audss 0 >> +mout_i2s 1 >> +dout_srp 2 >> +dout_aud_bus 3 >> +dout_i2s 4 >> +srp_clk 5 >> +i2s_bus 6 >> +sclk_i2s 7 >> +pcm_bus 8 >> +sclk_pcm 9 >> + >> +Example 1: An example of a clock controller node is listed below. >> + >> +clock_audss: audss-clock-controller@3810000 { >> + compatible = "samsung,exynos5250-audss-clock"; >> + reg = <0x03810000 0x0C>; >> + #clock-cells = <1>; >> +}; >> + >> +Example 2: I2S controller node that consumes the clock generated by the clock >> + controller. Refer to the standard clock bindings for information >> + about 'clocks' and 'clock-names' property. >> + >> +i2s0: i2s@03830000 { >> + compatible = "samsung,i2s-v5"; >> + reg = <0x03830000 0x100>; >> + dmas = <&pdma0 10 >> + &pdma0 9 >> + &pdma0 8>; >> + dma-names = "tx", "rx", "tx-sec"; >> + clocks = <&clock_audss EXYNOS_I2S_BUS>, >> + <&clock_audss EXYNOS_I2S_BUS>, >> + <&clock_audss EXYNOS_SCLK_I2S>, >> + <&clock_audss EXYNOS_MOUT_AUDSS>, >> + <&clock_audss EXYNOS_MOUT_I2S>; >> + clock-names = "iis", "i2s_opclk0", "i2s_opclk1", >> + "mout_audss", "mout_i2s"; >> +}; >> diff --git a/drivers/clk/samsung/Makefile b/drivers/clk/samsung/Makefile >> index b7c232e..1876810 100644 >> --- a/drivers/clk/samsung/Makefile >> +++ b/drivers/clk/samsung/Makefile >> @@ -6,3 +6,4 @@ obj-$(CONFIG_COMMON_CLK) += clk.o clk-pll.o >> obj-$(CONFIG_ARCH_EXYNOS4) += clk-exynos4.o >> obj-$(CONFIG_SOC_EXYNOS5250) += clk-exynos5250.o >> obj-$(CONFIG_SOC_EXYNOS5440) += clk-exynos5440.o >> +obj-$(CONFIG_ARCH_EXYNOS) += clk-exynos-audss.o >> diff --git a/drivers/clk/samsung/clk-exynos-audss.c b/drivers/clk/samsung/clk-exynos-audss.c >> new file mode 100644 >> index 0000000..9b1bbd5 >> --- /dev/null >> +++ b/drivers/clk/samsung/clk-exynos-audss.c >> @@ -0,0 +1,133 @@ >> +/* >> + * Copyright (c) 2013 Samsung Electronics Co., Ltd. >> + * Author: Padmavathi Venna <padma.v(a)samsung.com> >> + * >> + * This program is free software; you can redistribute it and/or modify >> + * it under the terms of the GNU General Public License version 2 as >> + * published by the Free Software Foundation. >> + * >> + * Common Clock Framework support for Audio Subsystem Clock Controller. >> +*/ >> + >> +#include <linux/clkdev.h> >> +#include <linux/io.h> >> +#include <linux/clk-provider.h> >> +#include <linux/of_address.h> >> +#include <linux/syscore_ops.h> >> + >> +#include <dt-bindings/clk/exynos-audss-clk.h> >> + >> +static DEFINE_SPINLOCK(lock); >> +static struct clk **clk_table; >> +static void __iomem *reg_base; >> +static struct clk_onecell_data clk_data; >> + >> +#define ASS_CLK_SRC 0x0 >> +#define ASS_CLK_DIV 0x4 >> +#define ASS_CLK_GATE 0x8 >> + >> +static unsigned long reg_save[][2] = { >> + {ASS_CLK_SRC, 0}, >> + {ASS_CLK_DIV, 0}, >> + {ASS_CLK_GATE, 0}, >> +}; >> + >> +/* list of all parent clock list */ >> +static const char *mout_audss_p[] = { "fin_pll", "fout_epll" }; >> +static const char *mout_i2s_p[] = { "mout_audss", "cdclk0", "sclk_audio0" }; >> + >> +#ifdef CONFIG_PM_SLEEP >> +static int exynos_audss_clk_suspend(void) >> +{ >> + int i; >> + >> + for (i = 0; i < ARRAY_SIZE(reg_save); i++) >> + reg_save[i][1] = readl(reg_base + reg_save[i][0]); >> + >> + return 0; >> +} >> + >> +static void exynos_audss_clk_resume(void) >> +{ >> + int i; >> + >> + for (i = 0; i < ARRAY_SIZE(reg_save); i++) >> + writel(reg_save[i][1], reg_base + reg_save[i][0]); >> +} >> + >> +static struct syscore_ops exynos_audss_clk_syscore_ops = { >> + .suspend = exynos_audss_clk_suspend, >> + .resume = exynos_audss_clk_resume, >> +}; >> +#endif /* CONFIG_PM_SLEEP */ >> + >> +/* register exynos_audss clocks */ >> +void __init exynos_audss_clk_init(struct device_node *np) >> +{ >> + reg_base = of_iomap(np, 0); >> + if (!reg_base) { >> + pr_err("%s: failed to map audss registers\n", __func__); >> + return; >> + } >> + >> + clk_table = kzalloc(sizeof(struct clk *) * EXYNOS_AUDSS_MAX_CLKS, >> + GFP_KERNEL); >> + if (!clk_table) { >> + pr_err("%s: could not allocate clk lookup table\n", __func__); >> + return; >> + } >> + >> + clk_data.clks = clk_table; >> + clk_data.clk_num = EXYNOS_AUDSS_MAX_CLKS; >> + of_clk_add_provider(np, of_clk_src_onecell_get, &clk_data); >> + >> + clk_table[EXYNOS_MOUT_AUDSS] = clk_register_mux(NULL, "mout_audss", >> + mout_audss_p, ARRAY_SIZE(mout_audss_p), 0, >> + reg_base + ASS_CLK_SRC, 0, 1, 0, &lock); >> + >> + clk_table[EXYNOS_MOUT_I2S] = clk_register_mux(NULL, "mout_i2s", >> + mout_i2s_p, ARRAY_SIZE(mout_i2s_p), 0, >> + reg_base + ASS_CLK_SRC, 2, 2, 0, &lock); >> + >> + clk_table[EXYNOS_DOUT_SRP] = clk_register_divider(NULL, "dout_srp", >> + "mout_audss", 0, reg_base + ASS_CLK_DIV, 0, 4, >> + 0, &lock); >> + >> + clk_table[EXYNOS_DOUT_AUD_BUS] = clk_register_divider(NULL, >> + "dout_aud_bus", "dout_srp", 0, >> + reg_base + ASS_CLK_DIV, 4, 4, 0, &lock); >> + >> + clk_table[EXYNOS_DOUT_I2S] = clk_register_divider(NULL, "dout_i2s", >> + "mout_i2s", 0, reg_base + ASS_CLK_DIV, 8, 4, 0, >> + &lock); >> + >> + clk_table[EXYNOS_SRP_CLK] = clk_register_gate(NULL, "srp_clk", >> + "dout_srp", CLK_SET_RATE_PARENT, >> + reg_base + ASS_CLK_GATE, 0, 0, &lock); >> + >> + clk_table[EXYNOS_I2S_BUS] = clk_register_gate(NULL, "i2s_bus", >> + "dout_aud_bus", CLK_SET_RATE_PARENT, >> + reg_base + ASS_CLK_GATE, 2, 0, &lock); >> + >> + clk_table[EXYNOS_SCLK_I2S] = clk_register_gate(NULL, "sclk_i2s", >> + "dout_i2s", CLK_SET_RATE_PARENT, >> + reg_base + ASS_CLK_GATE, 3, 0, &lock); >> + >> + clk_table[EXYNOS_PCM_BUS] = clk_register_gate(NULL, "pcm_bus", >> + "sclk_pcm", CLK_SET_RATE_PARENT, >> + reg_base + ASS_CLK_GATE, 4, 0, &lock); >> + >> + clk_table[EXYNOS_SCLK_PCM] = clk_register_gate(NULL, "sclk_pcm", >> + "div_pcm0", CLK_SET_RATE_PARENT, >> + reg_base + ASS_CLK_GATE, 5, 0, &lock); >> + >> +#ifdef CONFIG_PM_SLEEP >> + register_syscore_ops(&exynos_audss_clk_syscore_ops); >> +#endif >> + >> + pr_info("Exynos: Audss: clock setup completed\n"); >> +} >> +CLK_OF_DECLARE(exynos4210_audss_clk, "samsung,exynos4210-audss-clock", >> + exynos_audss_clk_init); >> +CLK_OF_DECLARE(exynos5250_audss_clk, "samsung,exynos5250-audss-clock", >> + exynos_audss_clk_init); >> diff --git a/include/dt-bindings/clk/exynos-audss-clk.h b/include/dt-bindings/clk/exynos-audss-clk.h >> new file mode 100644 >> index 0000000..8279f42 >> --- /dev/null >> +++ b/include/dt-bindings/clk/exynos-audss-clk.h >> @@ -0,0 +1,25 @@ >> +/* >> + * This header provides constants for Samsung audio subsystem >> + * clock controller. >> + * >> + * The constants defined in this header are being used in dts >> + * and exynos audss driver. >> + */ >> + >> +#ifndef _DT_BINDINGS_CLK_EXYNOS_AUDSS_H >> +#define _DT_BINDINGS_CLK_EXYNOS_AUDSS_H >> + >> +#define EXYNOS_MOUT_AUDSS 0 >> +#define EXYNOS_MOUT_I2S 1 >> +#define EXYNOS_DOUT_SRP 2 >> +#define EXYNOS_DOUT_AUD_BUS 3 >> +#define EXYNOS_DOUT_I2S 4 >> +#define EXYNOS_SRP_CLK 5 >> +#define EXYNOS_I2S_BUS 6 >> +#define EXYNOS_SCLK_I2S 7 >> +#define EXYNOS_PCM_BUS 8 >> +#define EXYNOS_SCLK_PCM 9 >> + >> +#define EXYNOS_AUDSS_MAX_CLKS 10 >> + >> +#endif >> -- >> 1.7.4.4

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