June 2013 - Alsa-devel - mailman.alsa-project.org

[alsa-devel] dsnoop memory leak
by Ivan Bolsunov 04 Jun '13

04 Jun '13

Hi guys, on may 31 I sent message, can you at least confirm what bug exist? Thanks.

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[alsa-devel] [PATCH V5 0/5] clk: Samsung: audss: Register audio subsytem clocks using common clk framework
by Padmavathi Venna 04 Jun '13

04 Jun '13

Samsung S5PV210 and Exynos SoC has a separate subsystem for audio. This subsystem has a internal clock controller which controls i2s0 and pcm0 clocks. This patch series adds the Samsung audio subsytem clock to the common clock framework and provides the I2S controllers clock information in the dtsi file. This patch series is made based on Kukjin Kim for-next branch Changes since V4: - Reworked on the nits given by Doug. - Removed mout_audss and mout_i2s from i2s nodes as we are not getting these clocks in the i2s driver. - Modified the I2S binding documentation for clocks and pinmux. Changes since V3: - Replaced samsung with exynos in the macro prefixes and function names as this driver supports mainly exynos and s5p family. - Added Reviewed-by:Sylwester Nawrocki <s.nawrocki(a)samsung.com> Changes since V2: - Removed s5pv210 compatible name from driver as it is not yet supported which is different from Exynos series audio subsystem clock conroller. - Removed clkdev lookup support and added alias names in the i2s0 controller node. Changes since V1: - Reworked on all review comments by Sylwester Nawrocki - Added a header file for all clock indexes as requested by Sylwester - Added different compatible names for s5pv210, exynos4 and exynos5 - Registered the pcm clocks with common clock framework Padmavathi Venna (5): ARM: samsung: use #include for all device trees clk: samsung: register audio subsystem clocks using common clock framework ARM: dts: add Exynos audio subsystem clock controller node ARM: dts: add clock provider information for i2s controllers in Exynos5250 ARM: dts: Update Samsung I2S documentation .../devicetree/bindings/clock/clk-exynos-audss.txt | 64 ++++++++++ .../devicetree/bindings/sound/samsung-i2s.txt | 40 ++---- arch/arm/boot/dts/exynos4.dtsi | 2 +- arch/arm/boot/dts/exynos4210-origen.dts | 2 +- arch/arm/boot/dts/exynos4210-smdkv310.dts | 2 +- arch/arm/boot/dts/exynos4210-trats.dts | 2 +- arch/arm/boot/dts/exynos4210-universal_c210.dts | 2 +- arch/arm/boot/dts/exynos4210.dtsi | 4 +- arch/arm/boot/dts/exynos4212.dtsi | 2 +- arch/arm/boot/dts/exynos4412-odroidx.dts | 2 +- arch/arm/boot/dts/exynos4412-origen.dts | 2 +- arch/arm/boot/dts/exynos4412-smdk4412.dts | 2 +- arch/arm/boot/dts/exynos4412.dtsi | 2 +- arch/arm/boot/dts/exynos4x12.dtsi | 4 +- arch/arm/boot/dts/exynos5250-arndale.dts | 2 +- arch/arm/boot/dts/exynos5250-smdk5250.dts | 2 +- arch/arm/boot/dts/exynos5250-snow.dts | 4 +- arch/arm/boot/dts/exynos5250.dtsi | 20 +++- arch/arm/boot/dts/exynos5440-sd5v1.dts | 2 +- arch/arm/boot/dts/exynos5440-ssdk5440.dts | 2 +- arch/arm/boot/dts/exynos5440.dtsi | 2 +- arch/arm/boot/dts/s3c2416-smdk2416.dts | 2 +- arch/arm/boot/dts/s3c2416.dtsi | 4 +- arch/arm/boot/dts/s3c24xx.dtsi | 2 +- drivers/clk/samsung/Makefile | 1 + drivers/clk/samsung/clk-exynos-audss.c | 133 ++++++++++++++++++++ include/dt-bindings/clk/exynos-audss-clk.h | 25 ++++ 27 files changed, 279 insertions(+), 54 deletions(-) create mode 100644 Documentation/devicetree/bindings/clock/clk-exynos-audss.txt create mode 100644 drivers/clk/samsung/clk-exynos-audss.c create mode 100644 include/dt-bindings/clk/exynos-audss-clk.h -- 1.7.4.4

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Re: [alsa-devel] [PATCH] ASoC: add RT5640 CODEC driver
by Mark Brown 04 Jun '13

04 Jun '13

On Fri, May 31, 2013 at 03:04:59PM +0800, bardliao(a)realtek.com wrote: > From: Bard Liao <bardliao(a)realtek.com> This looks pretty good, a few small things below and probably one actual bug. > > * Use regmap_range_cfg to replace index read/write function. > * Remove I2S3 related code since there is no I2S3 in ALC5640. > * Remove Voice DSP related code since there is no Voice DSP in ALC5640. > * Remove MICBIAS2 since there is no MICBIAS2 in ALC5640. > * Change DMIC1/2 CLK to DMIC1/2 Power since it is for enable/disable DMIC1/2 > * Modify some texts for consistent coding style. > * Merge sto adc l/r mux since it shares the same control bits. > * Other minor changes. Put stuff like this after the --- so it doesn't end up in the commit log. > + switch (event) { > + case SND_SOC_DAPM_POST_PMU: > + snd_soc_update_bits(codec, RT5640_PWR_DIG1, 0x0001, 0x0001); > + regmap_update_bits(rt5640->regmap, 0x1c, 0xf000, 0xf000); > + break; It's a bit weird to be using snd_soc_update_bits() and regmap_update_bits()... > + SND_SOC_DAPM_SUPPLY("DMIC1 Power", SND_SOC_NOPM, 0, 0, > + rt5640_set_dmic1_event, > + SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD), > + SND_SOC_DAPM_SUPPLY("DMIC2 Power", SND_SOC_NOPM, 0, 0, > + rt5640_set_dmic2_event, > + SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD), The enable bits could be listed here - this would be a bit more idiomatic, would save the PMD event and would enable the writes to be combined. > + case SND_SOC_BIAS_STANDBY: > + if (SND_SOC_BIAS_OFF == codec->dapm.bias_level) { > + snd_soc_update_bits(codec, RT5640_PWR_ANLG1, > + RT5640_PWR_VREF1 | RT5640_PWR_MB | > + RT5640_PWR_BG | RT5640_PWR_VREF2, > + RT5640_PWR_VREF1 | RT5640_PWR_MB | > + RT5640_PWR_BG | RT5640_PWR_VREF2); > + mdelay(10); > + snd_soc_update_bits(codec, RT5640_PWR_ANLG1, > + RT5640_PWR_FV1 | RT5640_PWR_FV2, > + RT5640_PWR_FV1 | RT5640_PWR_FV2); > + regcache_cache_only(rt5640->regmap, false); > + regcache_sync(rt5640->regmap); This looks wrong - you're writing to the device before you take it out of cache only mode so your delay in the above sequence will have no effect. > + val = snd_soc_read(codec, RT5640_VENDOR_ID2); > + if ((val != RT5640_DEVICE_ID)) { > + dev_err(codec->dev, > + "Device with ID register %x is not rt5640/39\n", val); > + return -ENODEV; > + } > + > + rt5640_reset(codec); Do these in the I2C probe function before you register the CODEC, that way we don't try to start the sound card if we can't talk to the device. > + ret = regmap_register_patch(rt5640->regmap, init_list, > + ARRAY_SIZE(init_list)); > + if (ret != 0) > + dev_warn(codec->dev, "Failed to apply regmap patch: %d\n", > + ret); This should also be in the I2C probe.

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[alsa-devel] regression: from 3.8 to 3.9: headphones output no sound on Intel HDA, codec VIA VT1802
by Alex Riesen 04 Jun '13

04 Jun '13

Hi, I just noticed (use the headphones rarely) that the headphones on this System76 Lemur Ultra (lemu4) stopped working. There is absolutely no output. I tried reverting all changes to patch_via.c since v3.8, and have the sound back, but there wasn't much to revert: Revert "ALSA: hda - Rearrange INPUT_PIN_ATTR_*" Revert "ALSA: hda - Use generic parser for VIA codec driver" Revert "ALSA: hda - Enable parsing the independent HP mode as default for VIA codecs" Revert "ALSA: hda/via - Fix wrong checks of power state bits" Revert "ALSA: hda - Fix phantom jacks on VT1708" Revert "ALSA: hda - detect jacks on VT1708 even when no streams are active" Revert "ALSA: hda - Use generic array for loopback list management" and one change (which I indeed suspect) is large: the use of generic parser. The problem is also present in 3.10-rc1. The output of alsa-info.sh attached, for 3.8.12 and 3.9.2 respectively. Regards, Alex Riesen

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Re: [alsa-devel] [PATCH] ASoC: add RT5640 CODEC driver
by Stephen Warren 04 Jun '13

04 Jun '13

On 05/31/2013 01:15 AM, Bard Liao wrote: > Stephen, > > I remove the DT support from this patch. > Can you add the DT support as a separate patch? Yes, I'll do that. I assume you also want me to add the code to control the LDO1_EN GPIO, since that seems missing from this patch. I thought you said you were going to add it. I assume you tested this on Dalmore by manually setting the GPIO from U-Boot before booting the kernel? I'll try to get to this ASAP; perhaps not today though - we'll see how long the other things I have stacked up take.

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Re: [alsa-devel] [PATCH V4 4/4] ARM: dts: add clock provider information for i2s controllers in Exynos5250
by Padma Venkat 04 Jun '13

04 Jun '13

Hi Doug, On Tue, Jun 4, 2013 at 1:48 AM, Doug Anderson <dianders(a)chromium.org> wrote: > Padmavathi, > > On Sun, Jun 2, 2013 at 10:19 PM, Padmavathi Venna <padma.v(a)samsung.com> wrote: >> + clocks = <&clock_audss EXYNOS_I2S_BUS>, >> + <&clock_audss EXYNOS_I2S_BUS>, >> + <&clock_audss EXYNOS_SCLK_I2S>, >> + <&clock_audss EXYNOS_MOUT_AUDSS>, >> + <&clock_audss EXYNOS_MOUT_I2S>; >> + clock-names = "iis", "i2s_opclk0", "i2s_opclk1", >> + "mout_audss", "mout_i2s"; > > Are there bindings for these clocks? Would be nice to see a > description for what they are supposed to be. Yes. They have bindings. I will add the description. > > I looked up i2s_opclk0 / i2s_opclk1 and they look reasonable at a > quick glance. ...and it does seem right that iis and i2s_opclk0 are > the same. ...but I don't see any place that uses the last two. Is > there an in-flight patch? I don't have any patch for these right now. These are used internally. But as these are i2s0 base clocks I added here. > > -Doug Thanks Padma

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Re: [alsa-devel] [PATCH V4 3/4] ARM: dts: add Exynos audio subsystem clock controller node
by Padma Venkat 04 Jun '13

04 Jun '13

Hi Doug, On Tue, Jun 4, 2013 at 1:43 AM, Doug Anderson <dianders(a)chromium.org> wrote: > Padmavathi, > > On Sun, Jun 2, 2013 at 10:19 PM, Padmavathi Venna <padma.v(a)samsung.com> wrote: >> Audio subsystem introduced in s5pv210 and exynos platforms >> which has a internal clock controller. This patch adds a node >> for the same on exynos5250. >> >> Signed-off-by: Padmavathi Venna <padma.v(a)samsung.com> >> Reviewed-by: Sylwester Nawrocki <s.nawrocki(a)samsung.com> >> --- >> arch/arm/boot/dts/exynos5250.dtsi | 6 ++++++ >> 1 files changed, 6 insertions(+), 0 deletions(-) >> >> diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi >> index bccda67..388983e 100644 >> --- a/arch/arm/boot/dts/exynos5250.dtsi >> +++ b/arch/arm/boot/dts/exynos5250.dtsi >> @@ -72,6 +72,12 @@ >> #clock-cells = <1>; >> }; >> >> + clock_audss: audss-clock-controller@3810000 { I removed this leading 0 as Tomasz Figa suggested. > > Nit: other places in the same file have the leading 0, like > i2s0: i2s@03830000 { This was the patch which got merged earlier. So I didn't modify this. Is it okey if I remove leading 0 for both of the nodes now? > > So you could follow suit and do: > > clock_audss: audss-clock-controller@03810000 { > > -Doug Thanks Padma

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[alsa-devel] cplay error "Can't find sync world"
by Keyon.Jey 04 Jun '13

04 Jun '13

hi, all, when I try use clpay -c 1 -d 2 test.mp3 to use tinycompress hwdec on my phone, "Can't find sync world" always occurred, no matter what mp3 music I try to play. vinod/guys, can you help? regards, Keyon

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[alsa-devel] [PATCH] ASoC: dapm: check suspend state in dapm_dai_check_power()
by Stephen Warren 03 Jun '13

03 Jun '13

From: Stephen Warren <swarren(a)nvidia.com> Currently, when the system enters suspend with audio playing, since the DAI widgets are active, the associated CODEC is considered active, and hence is not transition into a low-power bias state as the system suspends. This likely causes audio failure after resume, since the CODEC power has quite possibly been removed during suspend, and the bias level transitions in the CODEC driver are needed to recover from this. At the very least, this issue likely causes warnings in the kernel log due to the CODEC being left on over the suspend transition. To solve this, modify dapm_dai_check_power() not to consider DAI widgets active if the system is entering suspend. Suggested-by: Lars-Peter Clausen <lars(a)metafoo.de> Signed-off-by: Stephen Warren <swarren(a)nvidia.com> --- sound/soc/soc-dapm.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/sound/soc/soc-dapm.c b/sound/soc/soc-dapm.c index 3507346..bad545a 100644 --- a/sound/soc/soc-dapm.c +++ b/sound/soc/soc-dapm.c @@ -1133,7 +1133,7 @@ static int dapm_dai_check_power(struct snd_soc_dapm_widget *w) DAPM_UPDATE_STAT(w, power_checks); if (w->active) - return w->active; + return snd_soc_dapm_suspend_check(w); return dapm_generic_check_power(w); } -- 1.7.10.4

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[alsa-devel] [PATCH 1/2] ASoC: tegra: implement suspend/resume for Tegra30 AHUB
by Stephen Warren 03 Jun '13

03 Jun '13

From: Stephen Warren <swarren(a)nvidia.com> Add tegra30_ahub_{suspend,resume}. These use regcache functions to restore all HW registers after power loss during a suspend/resume cycle. Signed-off-by: Stephen Warren <swarren(a)nvidia.com> --- sound/soc/tegra/tegra30_ahub.c | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) diff --git a/sound/soc/tegra/tegra30_ahub.c b/sound/soc/tegra/tegra30_ahub.c index 23e592f..0f4787c 100644 --- a/sound/soc/tegra/tegra30_ahub.c +++ b/sound/soc/tegra/tegra30_ahub.c @@ -627,9 +627,30 @@ static int tegra30_ahub_remove(struct platform_device *pdev) return 0; } +#ifdef CONFIG_PM_SLEEP +static int tegra30_ahub_suspend(struct device *dev) +{ + regcache_mark_dirty(ahub->regmap_ahub); + regcache_mark_dirty(ahub->regmap_apbif); + + return 0; +} + +static int tegra30_ahub_resume(struct device *dev) +{ + int ret; + + ret = regcache_sync(ahub->regmap_ahub); + ret |= regcache_sync(ahub->regmap_apbif); + + return ret; +} +#endif + static const struct dev_pm_ops tegra30_ahub_pm_ops = { SET_RUNTIME_PM_OPS(tegra30_ahub_runtime_suspend, tegra30_ahub_runtime_resume, NULL) + SET_SYSTEM_SLEEP_PM_OPS(tegra30_ahub_suspend, tegra30_ahub_resume) }; static struct platform_driver tegra30_ahub_driver = { -- 1.7.10.4

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