February 2009 - Alsa-devel - mailman.alsa-project.org

[alsa-devel] Hammerfall hdsploader not working in ubuntu 8.10
by Robert Gründler 20 Feb '09

20 Feb '09

Hi, i'm using a rme Hammerfall hdsp multiface card which i've never had problems so far, due to the fact that it's pretty well supported. However, after upgrading to Ubuntu 8.10 the hdsploader fails to upload the firmware to the card with the following error: hdsploader - firmware loader for RME Hammerfall DSP cards Looking for HDSP + Multiface or Digiface cards : Card 0 : RME Hammerfall DSP + Multiface at 0xf87f0000, irq 22 Upload firmware for card hw:0 Hwdep ioctl error on card hw:0 : Device or resource busy. The hdspmixer shows up without problems but there's no sound in my system, which i guess is caused by the hdsploader problem. Here's the system info generated by the alsa information script i got in the irc channel: http://www.alsa-project.org/db/?f=79389b0e9bc3cce3a4d393e02db6ca476f85c4e7 The only difference i noticed between ubuntu 8.04 and 8.10 concerning the firmware was that the alsa-firmware package isn't included in the standard repos anymore. I've installed the package through the Medibuntu repository. Anyone knows what could cause this behaviour ? thanks ! -robert

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[alsa-devel] zero appl_ptr reported
by Wu Fengguang 20 Feb '09

20 Feb '09

Hi Takashi, I noticed that 'appl_ptr' is always 0 during playback, whether it be mplayer or aplay, T61 or DG45ID. Is this a bug? % grep -r . /proc/asound/card0/pcm0p /proc/asound/card0/pcm0p/sub0/prealloc_max:32768 /proc/asound/card0/pcm0p/sub0/prealloc:64 /proc/asound/card0/pcm0p/sub0/status:state: RUNNING /proc/asound/card0/pcm0p/sub0/status:trigger_time: 260.550520867 /proc/asound/card0/pcm0p/sub0/status:tstamp : 264.361429403 /proc/asound/card0/pcm0p/sub0/status:delay : -182952 /proc/asound/card0/pcm0p/sub0/status:avail : 191144 /proc/asound/card0/pcm0p/sub0/status:avail_max : 191144 /proc/asound/card0/pcm0p/sub0/status:----- /proc/asound/card0/pcm0p/sub0/status:hw_ptr : 182952 /proc/asound/card0/pcm0p/sub0/status:appl_ptr : 0 /proc/asound/card0/pcm0p/sub0/sw_params:tstamp_mode: ENABLE /proc/asound/card0/pcm0p/sub0/sw_params:period_step: 1 /proc/asound/card0/pcm0p/sub0/sw_params:avail_min: 1024 /proc/asound/card0/pcm0p/sub0/sw_params:start_threshold: 1 /proc/asound/card0/pcm0p/sub0/sw_params:stop_threshold: 4611686018427387904 /proc/asound/card0/pcm0p/sub0/sw_params:silence_threshold: 0 /proc/asound/card0/pcm0p/sub0/sw_params:silence_size: 4611686018427387904 /proc/asound/card0/pcm0p/sub0/sw_params:boundary: 4611686018427387904 /proc/asound/card0/pcm0p/sub0/hw_params:access: MMAP_INTERLEAVED /proc/asound/card0/pcm0p/sub0/hw_params:format: S32_LE /proc/asound/card0/pcm0p/sub0/hw_params:subformat: STD /proc/asound/card0/pcm0p/sub0/hw_params:channels: 2 /proc/asound/card0/pcm0p/sub0/hw_params:rate: 48000 (48000/1) /proc/asound/card0/pcm0p/sub0/hw_params:period_size: 1024 /proc/asound/card0/pcm0p/sub0/hw_params:buffer_size: 8192 /proc/asound/card0/pcm0p/sub0/info:card: 0 /proc/asound/card0/pcm0p/sub0/info:device: 0 /proc/asound/card0/pcm0p/sub0/info:subdevice: 0 /proc/asound/card0/pcm0p/sub0/info:stream: PLAYBACK /proc/asound/card0/pcm0p/sub0/info:id: STAC92xx Analog /proc/asound/card0/pcm0p/sub0/info:name: STAC92xx Analog /proc/asound/card0/pcm0p/sub0/info:subname: subdevice #0 /proc/asound/card0/pcm0p/sub0/info:class: 0 /proc/asound/card0/pcm0p/sub0/info:subclass: 0 /proc/asound/card0/pcm0p/sub0/info:subdevices_count: 1 /proc/asound/card0/pcm0p/sub0/info:subdevices_avail: 0 /proc/asound/card0/pcm0p/xrun_debug:0 /proc/asound/card0/pcm0p/info:card: 0 /proc/asound/card0/pcm0p/info:device: 0 /proc/asound/card0/pcm0p/info:subdevice: 0 /proc/asound/card0/pcm0p/info:stream: PLAYBACK /proc/asound/card0/pcm0p/info:id: STAC92xx Analog /proc/asound/card0/pcm0p/info:name: STAC92xx Analog /proc/asound/card0/pcm0p/info:subname: subdevice #0 /proc/asound/card0/pcm0p/info:class: 0 /proc/asound/card0/pcm0p/info:subclass: 0 /proc/asound/card0/pcm0p/info:subdevices_count: 1 /proc/asound/card0/pcm0p/info:subdevices_avail: 0 Interestingly DG45ID HDMI audio playback does not have this problem: /proc/asound/card0/pcm3p/sub0/prealloc_max:32768 /proc/asound/card0/pcm3p/sub0/prealloc:64 /proc/asound/card0/pcm3p/sub0/status:state: RUNNING /proc/asound/card0/pcm3p/sub0/status:trigger_time: 441.375970806 /proc/asound/card0/pcm3p/sub0/status:tstamp : 447.039903859 /proc/asound/card0/pcm3p/sub0/status:delay : 16096 /proc/asound/card0/pcm3p/sub0/status:avail : 288 /proc/asound/card0/pcm3p/sub0/status:avail_max : 288 /proc/asound/card0/pcm3p/sub0/status:----- /proc/asound/card0/pcm3p/sub0/status:hw_ptr : 249824 /proc/asound/card0/pcm3p/sub0/status:appl_ptr : 265920 /proc/asound/card0/pcm3p/sub0/sw_params:tstamp_mode: NONE /proc/asound/card0/pcm3p/sub0/sw_params:period_step: 1 /proc/asound/card0/pcm3p/sub0/sw_params:avail_min: 1024 /proc/asound/card0/pcm3p/sub0/sw_params:start_threshold: 1024 /proc/asound/card0/pcm3p/sub0/sw_params:stop_threshold: 4611686018427387904 /proc/asound/card0/pcm3p/sub0/sw_params:silence_threshold: 0 /proc/asound/card0/pcm3p/sub0/sw_params:silence_size: 4611686018427387904 /proc/asound/card0/pcm3p/sub0/sw_params:boundary: 4611686018427387904 /proc/asound/card0/pcm3p/sub0/hw_params:access: RW_INTERLEAVED /proc/asound/card0/pcm3p/sub0/hw_params:format: S16_LE /proc/asound/card0/pcm3p/sub0/hw_params:subformat: STD /proc/asound/card0/pcm3p/sub0/hw_params:channels: 2 /proc/asound/card0/pcm3p/sub0/hw_params:rate: 44100 (44100/1) /proc/asound/card0/pcm3p/sub0/hw_params:period_size: 1024 /proc/asound/card0/pcm3p/sub0/hw_params:buffer_size: 16384 /proc/asound/card0/pcm3p/sub0/info:card: 0 /proc/asound/card0/pcm3p/sub0/info:device: 3 /proc/asound/card0/pcm3p/sub0/info:subdevice: 0 /proc/asound/card0/pcm3p/sub0/info:stream: PLAYBACK /proc/asound/card0/pcm3p/sub0/info:id: INTEL HDMI /proc/asound/card0/pcm3p/sub0/info:name: INTEL HDMI /proc/asound/card0/pcm3p/sub0/info:subname: subdevice #0 /proc/asound/card0/pcm3p/sub0/info:class: 0 /proc/asound/card0/pcm3p/sub0/info:subclass: 0 /proc/asound/card0/pcm3p/sub0/info:subdevices_count: 1 /proc/asound/card0/pcm3p/sub0/info:subdevices_avail: 0 /proc/asound/card0/pcm3p/xrun_debug:0 /proc/asound/card0/pcm3p/info:card: 0 /proc/asound/card0/pcm3p/info:device: 3 /proc/asound/card0/pcm3p/info:subdevice: 0 /proc/asound/card0/pcm3p/info:stream: PLAYBACK /proc/asound/card0/pcm3p/info:id: INTEL HDMI /proc/asound/card0/pcm3p/info:name: INTEL HDMI /proc/asound/card0/pcm3p/info:subname: subdevice #0 /proc/asound/card0/pcm3p/info:class: 0 /proc/asound/card0/pcm3p/info:subclass: 0 /proc/asound/card0/pcm3p/info:subdevices_count: 1 /proc/asound/card0/pcm3p/info:subdevices_avail: 0 Thanks, Fengguang

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[alsa-devel] ASoC updates for 2.6.30
by Mark Brown 20 Feb '09

20 Feb '09

The following changes since commit 93b760b7072ca6972c15c798e97af3f830d8bbba: Mark Brown (1): ASoC: Implement SPI device unregistration for WM8731 are available in the git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound-2.6.git for-2.6.30 Mark Brown (3): ASoC: Check for errors when writing WM8731 reset register ASoC: Add device init/exit annotations to new-style Wolfson CODEC drivers ASoC: Disable WM8731 line bypass by default Peter Ujfalusi (1): ASoC: TWL4030: Add digital loopback support sound/soc/codecs/twl4030.c | 56 +++++++++++++++++++++++++++++++++++++++---- sound/soc/codecs/wm8350.c | 2 +- sound/soc/codecs/wm8731.c | 19 +++++++++++---- sound/soc/codecs/wm8900.c | 8 +++--- sound/soc/codecs/wm8903.c | 8 +++--- 5 files changed, 73 insertions(+), 20 deletions(-)

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[alsa-devel] HP pavilion dv5 1110ew - no hdmi sound
by Bartłomiej Holdenmayer 19 Feb '09

19 Feb '09

Welcome, I have no sound through HDMI. I have Nvidia Geforce 9200M GS with 180.11 driver. Alsa 1.0.19. And newest bios F13A. I was googling for a week and only solution i found was to upgrade Alsa and Nvidia to the newest version. I did, but i still do not have sound over HDMI. In Win$ it is working ok. http://www.alsa-project.org/db/?f=01be9175263a5021fcfef3a47123afc04d62a863 - Pozdrawiam / Regards bartek GG:541634; ICQ:33920811;

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[PATCH v3] Allow choice in ac97 gpio reset line
by Robert Jarzmik 19 Feb '09

19 Feb '09

As the PXA27x series allow 2 gpios to reset the ac97 bus, allow through platform data configuration the definition of the correct gpio which will reset the AC97 bus. This comes from a silicon defect on the PXA27x series, where the gpio must be manually controlled in warm reset cases. Signed-off-by: Robert Jarzmik <rjarzmik(a)free.fr> --- include/sound/pxa2xx-lib.h | 15 +++++++++ sound/arm/pxa2xx-ac97-lib.c | 71 ++++++++++++++++++++++++++++++++++++++++--- 2 files changed, 81 insertions(+), 5 deletions(-) diff --git a/include/sound/pxa2xx-lib.h b/include/sound/pxa2xx-lib.h index 2fd3d25..2c894b6 100644 --- a/include/sound/pxa2xx-lib.h +++ b/include/sound/pxa2xx-lib.h @@ -42,4 +42,19 @@ extern int pxa2xx_ac97_hw_resume(void); extern int pxa2xx_ac97_hw_probe(struct platform_device *dev); extern void pxa2xx_ac97_hw_remove(struct platform_device *dev); +/* AC97 platform_data */ +/** + * struct pxa2xx_ac97_platform_data - pxa ac97 platform data + * @reset_gpio: AC97 reset gpio (normally gpio113 or gpio95) + * a -1 value means no gpio will be used for reset + * + * Platform data should only be specified for pxa27x CPUs where a silicon bug + * prevents correct operation of the reset line. If not specified, the default + * behaviour is to consider gpio 113 as the AC97 reset line, which is the + * default on most boards. + */ +struct pxa2xx_ac97_platform_data { + int reset_gpio; +}; + #endif diff --git a/sound/arm/pxa2xx-ac97-lib.c b/sound/arm/pxa2xx-ac97-lib.c index 35afd0c..d721ea7 100644 --- a/sound/arm/pxa2xx-ac97-lib.c +++ b/sound/arm/pxa2xx-ac97-lib.c @@ -31,6 +31,7 @@ static DECLARE_WAIT_QUEUE_HEAD(gsr_wq); static volatile long gsr_bits; static struct clk *ac97_clk; static struct clk *ac97conf_clk; +static int reset_gpio; /* * Beware PXA27x bugs: @@ -42,6 +43,45 @@ static struct clk *ac97conf_clk; * 1 jiffy timeout if interrupt never comes). */ +enum { + RESETGPIO_FORCE_HIGH, + RESETGPIO_FORCE_LOW, + RESETGPIO_NORMAL_ALTFUNC +}; + +/** + * set_resetgpio_mode - computes and sets the AC97_RESET gpio mode on PXA + * @mode: chosen action + * + * As the PXA27x CPUs suffer from a AC97 bug, a manual control of the reset line + * must be done to insure proper work of AC97 reset line. This function + * computes the correct gpio_mode for further use by reset functions, and + * applied the change through pxa_gpio_mode. + */ +static void set_resetgpio_mode(int resetgpio_action) +{ + int mode = 0; + + if (reset_gpio) + switch (resetgpio_action) { + case RESETGPIO_NORMAL_ALTFUNC: + if (reset_gpio == 113) + mode = 113 | GPIO_OUT | GPIO_DFLT_LOW; + if (reset_gpio == 95) + mode = 95 | GPIO_ALT_FN_1_OUT; + break; + case RESETGPIO_FORCE_LOW: + mode = reset_gpio | GPIO_OUT | GPIO_DFLT_LOW; + break; + case RESETGPIO_FORCE_HIGH: + mode = reset_gpio | GPIO_OUT | GPIO_DFLT_HIGH; + break; + }; + + if (mode) + pxa_gpio_mode(mode); +} + unsigned short pxa2xx_ac97_read(struct snd_ac97 *ac97, unsigned short reg) { unsigned short val = -1; @@ -137,10 +177,10 @@ static inline void pxa_ac97_warm_pxa27x(void) /* warm reset broken on Bulverde, so manually keep AC97 reset high */ - pxa_gpio_mode(113 | GPIO_OUT | GPIO_DFLT_HIGH); + set_resetgpio_mode(RESETGPIO_FORCE_HIGH); udelay(10); GCR |= GCR_WARM_RST; - pxa_gpio_mode(113 | GPIO_ALT_FN_2_OUT); + set_resetgpio_mode(RESETGPIO_NORMAL_ALTFUNC); udelay(500); } @@ -308,8 +348,8 @@ int pxa2xx_ac97_hw_resume(void) pxa_gpio_mode(GPIO29_SDATA_IN_AC97_MD); } if (cpu_is_pxa27x()) { - /* Use GPIO 113 as AC97 Reset on Bulverde */ - pxa_gpio_mode(113 | GPIO_ALT_FN_2_OUT); + /* Use GPIO 113 or 95 as AC97 Reset on Bulverde */ + set_resetgpio_mode(RESETGPIO_NORMAL_ALTFUNC); } clk_enable(ac97_clk); return 0; @@ -320,6 +360,27 @@ EXPORT_SYMBOL_GPL(pxa2xx_ac97_hw_resume); int __devinit pxa2xx_ac97_hw_probe(struct platform_device *dev) { int ret; + struct pxa2xx_ac97_platform_data *pdata = dev->dev.platform_data; + + if (pdata) { + switch (pdata->reset_gpio) { + case 95: + case 113: + reset_gpio = pdata->reset_gpio; + break; + case 0: + reset_gpio = 113; + break; + case -1: + break; + default: + dev_err(dev, "Invalid reset GPIO %d\n", + pdata->reset_gpio); + } + } else { + if (cpu_is_pxa27x()) + reset_gpio = 113; + } if (cpu_is_pxa25x() || cpu_is_pxa27x()) { pxa_gpio_mode(GPIO31_SYNC_AC97_MD); @@ -330,7 +391,7 @@ int __devinit pxa2xx_ac97_hw_probe(struct platform_device *dev) if (cpu_is_pxa27x()) { /* Use GPIO 113 as AC97 Reset on Bulverde */ - pxa_gpio_mode(113 | GPIO_ALT_FN_2_OUT); + set_resetgpio_mode(RESETGPIO_NORMAL_ALTFUNC); ac97conf_clk = clk_get(&dev->dev, "AC97CONFCLK"); if (IS_ERR(ac97conf_clk)) { ret = PTR_ERR(ac97conf_clk); -- 1.5.6.5

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[PATCH v2] Allow choice in ac97 gpio reset line
by Robert Jarzmik 19 Feb '09

19 Feb '09

As the PXA27x series allow 2 gpios to reset the ac97 bus, allow through platform data configuration the definition of the correct gpio which will reset the AC97 bus. This comes from a silicon defect on the PXA27x series, where the gpio must be manually controlled in warm reset cases. Signed-off-by: Robert Jarzmik <rjarzmik(a)free.fr> --- include/sound/pxa2xx-lib.h | 14 +++++++++ sound/arm/pxa2xx-ac97-lib.c | 68 +++++++++++++++++++++++++++++++++++++++--- 2 files changed, 77 insertions(+), 5 deletions(-) diff --git a/include/sound/pxa2xx-lib.h b/include/sound/pxa2xx-lib.h index 2fd3d25..9ee0f19 100644 --- a/include/sound/pxa2xx-lib.h +++ b/include/sound/pxa2xx-lib.h @@ -42,4 +42,18 @@ extern int pxa2xx_ac97_hw_resume(void); extern int pxa2xx_ac97_hw_probe(struct platform_device *dev); extern void pxa2xx_ac97_hw_remove(struct platform_device *dev); +/* AC97 platform_data */ +/** + * struct pxa2xx_ac97_platform_data - pxa ac97 platform data + * @reset_gpio: AC97 reset gpio (normally gpio113 or gpio95) + * + * Platform data should only be specified for pxa27x CPUs where a silicon bug + * prevents correct operation of the reset line. If not specified, the default + * behaviour is to consider gpio 113 as the AC97 reset line, which is the + * default on most boards. + */ +struct pxa2xx_ac97_platform_data { + int reset_gpio; +}; + #endif diff --git a/sound/arm/pxa2xx-ac97-lib.c b/sound/arm/pxa2xx-ac97-lib.c index 35afd0c..1df4b0b 100644 --- a/sound/arm/pxa2xx-ac97-lib.c +++ b/sound/arm/pxa2xx-ac97-lib.c @@ -31,6 +31,7 @@ static DECLARE_WAIT_QUEUE_HEAD(gsr_wq); static volatile long gsr_bits; static struct clk *ac97_clk; static struct clk *ac97conf_clk; +static int reset_gpio; /* * Beware PXA27x bugs: @@ -42,6 +43,45 @@ static struct clk *ac97conf_clk; * 1 jiffy timeout if interrupt never comes). */ +enum { + RESETGPIO_FORCE_HIGH, + RESETGPIO_FORCE_LOW, + RESETGPIO_NORMAL_ALTFUNC +}; + +/** + * set_resetgpio_mode - computes and sets the AC97_RESET gpio mode on PXA + * @mode: chosen action + * + * As the PXA27x CPUs suffer from a AC97 bug, a manual control of the reset line + * must be done to insure proper work of AC97 reset line. This function + * computes the correct gpio_mode for further use by reset functions, and + * applied the change through pxa_gpio_mode. + */ +static void set_resetgpio_mode(int resetgpio_action) +{ + int mode = 0; + + if (reset_gpio) + switch (resetgpio_action) { + case RESETGPIO_NORMAL_ALTFUNC: + if (reset_gpio == 113) + mode = 113 | GPIO_OUT | GPIO_DFLT_LOW; + if (reset_gpio == 95) + mode = 95 | GPIO_ALT_FN_1_OUT; + break; + case RESETGPIO_FORCE_LOW: + mode = reset_gpio | GPIO_OUT | GPIO_DFLT_LOW; + break; + case RESETGPIO_FORCE_HIGH: + mode = reset_gpio | GPIO_OUT | GPIO_DFLT_HIGH; + break; + }; + + if (mode) + pxa_gpio_mode(mode); +} + unsigned short pxa2xx_ac97_read(struct snd_ac97 *ac97, unsigned short reg) { unsigned short val = -1; @@ -137,10 +177,10 @@ static inline void pxa_ac97_warm_pxa27x(void) /* warm reset broken on Bulverde, so manually keep AC97 reset high */ - pxa_gpio_mode(113 | GPIO_OUT | GPIO_DFLT_HIGH); + set_resetgpio_mode(RESETGPIO_FORCE_HIGH); udelay(10); GCR |= GCR_WARM_RST; - pxa_gpio_mode(113 | GPIO_ALT_FN_2_OUT); + set_resetgpio_mode(RESETGPIO_NORMAL_ALTFUNC); udelay(500); } @@ -308,8 +348,8 @@ int pxa2xx_ac97_hw_resume(void) pxa_gpio_mode(GPIO29_SDATA_IN_AC97_MD); } if (cpu_is_pxa27x()) { - /* Use GPIO 113 as AC97 Reset on Bulverde */ - pxa_gpio_mode(113 | GPIO_ALT_FN_2_OUT); + /* Use GPIO 113 or 95 as AC97 Reset on Bulverde */ + set_resetgpio_mode(RESETGPIO_NORMAL_ALTFUNC); } clk_enable(ac97_clk); return 0; @@ -320,6 +360,24 @@ EXPORT_SYMBOL_GPL(pxa2xx_ac97_hw_resume); int __devinit pxa2xx_ac97_hw_probe(struct platform_device *dev) { int ret; + struct pxa2xx_ac97_platform_data *pdata = dev->dev.platform_data; + + if (pdata) { + switch (pdata->reset_gpio) { + case 95: + case 113: + reset_gpio = pdata->reset_gpio; + break; + case 0: + break; + default: + dev_err(dev, "Invalid reset GPIO %d\n", + pdata->reset_gpio); + } + } else { + if (cpu_is_pxa27x()) + reset_gpio = 113; + } if (cpu_is_pxa25x() || cpu_is_pxa27x()) { pxa_gpio_mode(GPIO31_SYNC_AC97_MD); @@ -330,7 +388,7 @@ int __devinit pxa2xx_ac97_hw_probe(struct platform_device *dev) if (cpu_is_pxa27x()) { /* Use GPIO 113 as AC97 Reset on Bulverde */ - pxa_gpio_mode(113 | GPIO_ALT_FN_2_OUT); + set_resetgpio_mode(RESETGPIO_NORMAL_ALTFUNC); ac97conf_clk = clk_get(&dev->dev, "AC97CONFCLK"); if (IS_ERR(ac97conf_clk)) { ret = PTR_ERR(ac97conf_clk); -- 1.5.6.5

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[PATCH v2] Allow choice in ac97 gpio reset line
by Robert Jarzmik 19 Feb '09

19 Feb '09

As the PXA series allow 2 gpios to reset the ac97 bus, allow through platform data configuration the definition of the correct gpio which will reset the AC97 bus. This comes from a silicon defect on the PXA series, where the gpio must be manually controlled in warm reset cases. Signed-off-by: Robert Jarzmik <rjarzmik(a)free.fr> --- include/sound/pxa2xx-lib.h | 11 +++++++ sound/arm/pxa2xx-ac97-lib.c | 71 ++++++++++++++++++++++++++++++++++++++++--- 2 files changed, 77 insertions(+), 5 deletions(-) diff --git a/include/sound/pxa2xx-lib.h b/include/sound/pxa2xx-lib.h index 2fd3d25..01c2e4a 100644 --- a/include/sound/pxa2xx-lib.h +++ b/include/sound/pxa2xx-lib.h @@ -42,4 +42,15 @@ extern int pxa2xx_ac97_hw_resume(void); extern int pxa2xx_ac97_hw_probe(struct platform_device *dev); extern void pxa2xx_ac97_hw_remove(struct platform_device *dev); +/* AC97 platform_data */ +/** + * struct pxa2xx_ac97_platform_data - pxa ac97 platform data + * @reset_gpio_95: AC97 reset gpio is gpio95 + * @reset_gpio_113: AC97 reset gpio is gpio113 + */ +struct pxa2xx_ac97_platform_data { + unsigned reset_gpio_95:1; + unsigned reset_gpio_113:1; +}; + #endif diff --git a/sound/arm/pxa2xx-ac97-lib.c b/sound/arm/pxa2xx-ac97-lib.c index 35afd0c..acf2e5a 100644 --- a/sound/arm/pxa2xx-ac97-lib.c +++ b/sound/arm/pxa2xx-ac97-lib.c @@ -31,6 +31,8 @@ static DECLARE_WAIT_QUEUE_HEAD(gsr_wq); static volatile long gsr_bits; static struct clk *ac97_clk; static struct clk *ac97conf_clk; +static int is_ac97_resetgpio_95; +static int is_ac97_resetgpio_113; /* * Beware PXA27x bugs: @@ -42,6 +44,55 @@ static struct clk *ac97conf_clk; * 1 jiffy timeout if interrupt never comes). */ +enum { + RESETGPIO_FORCE_HIGH, + RESETGPIO_FORCE_LOW, + RESETGPIO_NORMAL_ALTFUNC +}; + +/** + * set_resetgpio_mode - computes and sets the AC97_RESET gpio mode on PXA + * @mode: chosen action + * + * As the PXA CPUs suffer from a AC97 bug, a manual control of the reset + * line must be done to insure proper work of AC97 reset line. + * This function computes the correct gpio_mode for further use by reset + * functions, and applied the change through pxa_gpio_mode. + */ +static void set_resetgpio_mode(int resetgpio_action) +{ + int mode = 0; + + if (is_ac97_resetgpio_113) + switch (resetgpio_action) { + case RESETGPIO_FORCE_LOW: + mode = 113 | GPIO_OUT | GPIO_DFLT_LOW; + break; + case RESETGPIO_FORCE_HIGH: + mode = 113 | GPIO_OUT | GPIO_DFLT_HIGH; + break; + case RESETGPIO_NORMAL_ALTFUNC: + mode = 113 | GPIO_ALT_FN_2_OUT; + break; + }; + + if (is_ac97_resetgpio_95) + switch (resetgpio_action) { + case RESETGPIO_FORCE_LOW: + mode = 95 | GPIO_OUT | GPIO_DFLT_LOW; + break; + case RESETGPIO_FORCE_HIGH: + mode = 95 | GPIO_OUT | GPIO_DFLT_HIGH; + break; + case RESETGPIO_NORMAL_ALTFUNC: + mode = 95 | GPIO_ALT_FN_1_OUT; + break; + }; + + if (mode) + pxa_gpio_mode(mode); +} + unsigned short pxa2xx_ac97_read(struct snd_ac97 *ac97, unsigned short reg) { unsigned short val = -1; @@ -137,10 +188,10 @@ static inline void pxa_ac97_warm_pxa27x(void) /* warm reset broken on Bulverde, so manually keep AC97 reset high */ - pxa_gpio_mode(113 | GPIO_OUT | GPIO_DFLT_HIGH); + set_resetgpio_mode(RESETGPIO_FORCE_HIGH); udelay(10); GCR |= GCR_WARM_RST; - pxa_gpio_mode(113 | GPIO_ALT_FN_2_OUT); + set_resetgpio_mode(RESETGPIO_NORMAL_ALTFUNC); udelay(500); } @@ -308,8 +359,8 @@ int pxa2xx_ac97_hw_resume(void) pxa_gpio_mode(GPIO29_SDATA_IN_AC97_MD); } if (cpu_is_pxa27x()) { - /* Use GPIO 113 as AC97 Reset on Bulverde */ - pxa_gpio_mode(113 | GPIO_ALT_FN_2_OUT); + /* Use GPIO 113 or 95 as AC97 Reset on Bulverde */ + set_resetgpio_mode(RESETGPIO_NORMAL_ALTFUNC); } clk_enable(ac97_clk); return 0; @@ -320,6 +371,16 @@ EXPORT_SYMBOL_GPL(pxa2xx_ac97_hw_resume); int __devinit pxa2xx_ac97_hw_probe(struct platform_device *dev) { int ret; + struct pxa2xx_ac97_platform_data *pdata = dev->dev.platform_data; + + if (!pdata) { + is_ac97_resetgpio_113 = 1; + } else { + if (pdata->reset_gpio_95) + is_ac97_resetgpio_95 = 1; + if (pdata->reset_gpio_113) + is_ac97_resetgpio_113 = 1; + } if (cpu_is_pxa25x() || cpu_is_pxa27x()) { pxa_gpio_mode(GPIO31_SYNC_AC97_MD); @@ -330,7 +391,7 @@ int __devinit pxa2xx_ac97_hw_probe(struct platform_device *dev) if (cpu_is_pxa27x()) { /* Use GPIO 113 as AC97 Reset on Bulverde */ - pxa_gpio_mode(113 | GPIO_ALT_FN_2_OUT); + set_resetgpio_mode(RESETGPIO_NORMAL_ALTFUNC); ac97conf_clk = clk_get(&dev->dev, "AC97CONFCLK"); if (IS_ERR(ac97conf_clk)) { ret = PTR_ERR(ac97conf_clk); -- 1.5.6.5

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[PATCH] Allow choice in ac97 gpio reset line
by Robert Jarzmik 19 Feb '09

19 Feb '09

As the PXA series allow 2 gpios to reset the ac97 bus, allow through configuration the definition of the correct gpio which will reset the AC97 bus. This comes from a silicon defect on the PXA series, where the gpio must be manually controlled in warm reset cases. Signed-off-by: Robert Jarzmik <rjarzmik(a)free.fr> --- sound/arm/Kconfig | 17 +++++++++++ sound/arm/pxa2xx-ac97-lib.c | 68 +++++++++++++++++++++++++++++++++++++++--- 2 files changed, 80 insertions(+), 5 deletions(-) diff --git a/sound/arm/Kconfig b/sound/arm/Kconfig index f8e6de4..2749274 100644 --- a/sound/arm/Kconfig +++ b/sound/arm/Kconfig @@ -39,6 +39,23 @@ config SND_PXA2XX_LIB config SND_PXA2XX_LIB_AC97 bool +choice + prompt "PXA GPIO line used to reset AC97 bus" + depends on SND_PXA2XX_LIB_AC97 + help + Choose which GPIO is assigned the AC97 reset function. + + Usually board designers use GPIO 113, but GPIO 95 can be used + as well. + +config SND_PXA2XX_LIB_AC97_RESET113 + bool "GPIO113" + +config SND_PXA2XX_LIB_AC97_RESET95 + bool "GPIO95" + +endchoice + config SND_PXA2XX_AC97 tristate "AC97 driver for the Intel PXA2xx chip" depends on ARCH_PXA diff --git a/sound/arm/pxa2xx-ac97-lib.c b/sound/arm/pxa2xx-ac97-lib.c index 35afd0c..aa522d2 100644 --- a/sound/arm/pxa2xx-ac97-lib.c +++ b/sound/arm/pxa2xx-ac97-lib.c @@ -31,6 +31,8 @@ static DECLARE_WAIT_QUEUE_HEAD(gsr_wq); static volatile long gsr_bits; static struct clk *ac97_clk; static struct clk *ac97conf_clk; +static int is_ac97_resetgpio_95; +static int is_ac97_resetgpio_113; /* * Beware PXA27x bugs: @@ -42,6 +44,55 @@ static struct clk *ac97conf_clk; * 1 jiffy timeout if interrupt never comes). */ +enum { + RESETGPIO_FORCE_HIGH, + RESETGPIO_FORCE_LOW, + RESETGPIO_NORMAL_ALTFUNC +}; + +/** + * set_resetgpio_mode - computes and sets the AC97_RESET gpio mode on PXA + * @mode: chosen action + * + * As the PXA CPUs suffer from a AC97 bug, a manual control of the reset + * line must be done to insure proper work of AC97 reset line. + * This function computes the correct gpio_mode for further use by reset + * functions, and applied the change through pxa_gpio_mode. + */ +static void set_resetgpio_mode(int resetgpio_action) +{ + int mode = 0; + + if (is_ac97_resetgpio_113) + switch (resetgpio_action) { + case RESETGPIO_FORCE_LOW: + mode = 113 | GPIO_OUT | GPIO_DFLT_LOW; + break; + case RESETGPIO_FORCE_HIGH: + mode = 113 | GPIO_OUT | GPIO_DFLT_HIGH; + break; + case RESETGPIO_NORMAL_ALTFUNC: + mode = 113 | GPIO_ALT_FN_2_OUT; + break; + }; + + if (is_ac97_resetgpio_95) + switch (resetgpio_action) { + case RESETGPIO_FORCE_LOW: + mode = 95 | GPIO_OUT | GPIO_DFLT_LOW; + break; + case RESETGPIO_FORCE_HIGH: + mode = 95 | GPIO_OUT | GPIO_DFLT_HIGH; + break; + case RESETGPIO_NORMAL_ALTFUNC: + mode = 95 | GPIO_ALT_FN_1_OUT; + break; + }; + + if (mode) + pxa_gpio_mode(mode); +} + unsigned short pxa2xx_ac97_read(struct snd_ac97 *ac97, unsigned short reg) { unsigned short val = -1; @@ -137,10 +188,10 @@ static inline void pxa_ac97_warm_pxa27x(void) /* warm reset broken on Bulverde, so manually keep AC97 reset high */ - pxa_gpio_mode(113 | GPIO_OUT | GPIO_DFLT_HIGH); + set_resetgpio_mode(RESETGPIO_FORCE_HIGH); udelay(10); GCR |= GCR_WARM_RST; - pxa_gpio_mode(113 | GPIO_ALT_FN_2_OUT); + set_resetgpio_mode(RESETGPIO_NORMAL_ALTFUNC); udelay(500); } @@ -308,8 +359,8 @@ int pxa2xx_ac97_hw_resume(void) pxa_gpio_mode(GPIO29_SDATA_IN_AC97_MD); } if (cpu_is_pxa27x()) { - /* Use GPIO 113 as AC97 Reset on Bulverde */ - pxa_gpio_mode(113 | GPIO_ALT_FN_2_OUT); + /* Use GPIO 113 or 95 as AC97 Reset on Bulverde */ + set_resetgpio_mode(RESETGPIO_NORMAL_ALTFUNC); } clk_enable(ac97_clk); return 0; @@ -321,6 +372,13 @@ int __devinit pxa2xx_ac97_hw_probe(struct platform_device *dev) { int ret; +#ifdef CONFIG_SND_PXA2XX_LIB_AC97_RESET113 + is_ac97_resetgpio_113 = 1; +#endif +#ifdef CONFIG_SND_PXA2XX_LIB_AC97_RESET95 + is_ac97_resetgpio_95 = 1; +#endif + if (cpu_is_pxa25x() || cpu_is_pxa27x()) { pxa_gpio_mode(GPIO31_SYNC_AC97_MD); pxa_gpio_mode(GPIO30_SDATA_OUT_AC97_MD); @@ -330,7 +388,7 @@ int __devinit pxa2xx_ac97_hw_probe(struct platform_device *dev) if (cpu_is_pxa27x()) { /* Use GPIO 113 as AC97 Reset on Bulverde */ - pxa_gpio_mode(113 | GPIO_ALT_FN_2_OUT); + set_resetgpio_mode(RESETGPIO_NORMAL_ALTFUNC); ac97conf_clk = clk_get(&dev->dev, "AC97CONFCLK"); if (IS_ERR(ac97conf_clk)) { ret = PTR_ERR(ac97conf_clk); -- 1.5.6.5

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Re: [alsa-devel] Regression: snd_hda_intel driver causes quake3 to hang
by Takashi Iwai 19 Feb '09

19 Feb '09

At Thu, 19 Feb 2009 16:55:39 +0000, Charlie Baylis wrote: > > On Tue, Feb 17, 2009 at 01:05:46PM +0100, Takashi Iwai wrote: > > At Tue, 17 Feb 2009 11:49:17 +0000, Charlie Baylis wrote: > > > > > > > > > Hi > > > > > > Some time ago, quake3 stopped running correctly on my PC. This occured when > > > changing kernel from 2.6.25 to 2.6.27. The symptom is that within a > > > fraction of a second of gameplay, the game freezes. Switching to a console > > > allows the game to be killed. I am using standard kernel.org kernels with > > > no additional patches. > > > > Could you check whether it happens with 2.6.29-rc5? On 2.6.29, the delayed > > handling is done via its own workqueue, so this might be no longer a problem. > > > > Also you could try position_fix=1 instead of bdl_pos_adj. > > > > The problem is likely your hardware does unreliable DMA position reporting. > > Detecting such a broken hardware would be possible, but it'll be a bit > > tricky... > > I tried the latest git (shortly after 2.6.29-rc5) and I found that the same > symptoms occur. This happens with the driver defaults, or with bdl_pos_adj=0, > or with position_fix=1. So 2.6.29 is worse, because there seems to be no > workaround. > > Is there a way to find out whether my hardware really is broken? I had no > problems until the bdl_pos_adj workaround/feature was added. On 2.6.29, bdl_pos_adj=0 disables that. So it'll be a workaround for you, at least. Takashi

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[alsa-devel] [PATCH] Remove documentation for OSS CS4232 driver
by Krzysztof Helt 19 Feb '09

19 Feb '09

From: Krzysztof Helt <krzysztof.h1(a)wp.pl> There is no OSS cs4232 driver in the kernel any more and this documentation does not contain any info useful for ALSA driver. Signed-off-by: Krzysztof Helt <krzysztof.h1(a)wp.pl> --- Documentation/sound/oss/CS4232 | 23 ----------------------- 1 files changed, 0 insertions(+), 23 deletions(-) delete mode 100644 Documentation/sound/oss/CS4232 diff --git a/Documentation/sound/oss/CS4232 b/Documentation/sound/oss/CS4232 deleted file mode 100644 index 7d6af7a..0000000 --- a/Documentation/sound/oss/CS4232 +++ /dev/null @@ -1,23 +0,0 @@ -To configure the Crystal CS423x sound chip and activate its DSP functions, -modules may be loaded in this order: - - modprobe sound - insmod ad1848 - insmod uart401 - insmod cs4232 io=* irq=* dma=* dma2=* - -This is the meaning of the parameters: - - io--I/O address of the Windows Sound System (normally 0x534) - irq--IRQ of this device - dma and dma2--DMA channels (DMA2 may be 0) - -On some cards, the board attempts to do non-PnP setup, and fails. If you -have problems, use Linux' PnP facilities. - -To get MIDI facilities add - - insmod opl3 io=* - -where "io" is the I/O address of the OPL3 synthesizer. This will be shown -in /proc/sys/pnp and is normally 0x388. -- 1.5.2.2 ---------------------------------------------------------------------- Promocja w Speak Up. Kurs angielskiego za darmo. Liczba miejsc ograniczona. Sprawd�!>> http://link.interia.pl/f205c

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