[PATCH] ALSA: hda/cirrus: Add extra 10 ms delay to allow PLL settle and lock.

[Takashi Iwai]

On Mon, 05 Dec 2022 15:57:13 +0100,
Vitaly Rodionov wrote:
> 
> New HW platforms with multiple CS42L42 parts, faster CPU and i2c
> requre some extra delay to allow PLL to settle and lock. Adding
> extra 10ms delay.
> 
> Signed-off-by: Vitaly Rodionov <vitalyr at opensource.cirrus.com>

Thanks, applied.


Takashi