[PATCH v4 6/7] ASoC: codecs: lpass-tx-macro: add support for lpass tx macro

[kernel test robot]

Hi Srinivas,

I love your patch! Perhaps something to improve:

[auto build test WARNING on asoc/for-next]
[also build test WARNING on v5.11-rc7 next-20210125]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]

url:    https://github.com/0day-ci/linux/commits/Srinivas-Kandagatla/ASoC-codecs-add-support-for-LPASS-Codec-TX-and-RX-macros/20210210-173746
base:   https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git for-next
config: nds32-allyesconfig (attached as .config)
compiler: nds32le-linux-gcc (GCC) 9.3.0
reproduce (this is a W=1 build):
        wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
        chmod +x ~/bin/make.cross
        # https://github.com/0day-ci/linux/commit/f89c637c64f13146c0b9117f3c8a6c43adf5eeb3
        git remote add linux-review https://github.com/0day-ci/linux
        git fetch --no-tags linux-review Srinivas-Kandagatla/ASoC-codecs-add-support-for-LPASS-Codec-TX-and-RX-macros/20210210-173746
        git checkout f89c637c64f13146c0b9117f3c8a6c43adf5eeb3
        # save the attached .config to linux build tree
        COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross ARCH=nds32 

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp at intel.com>

All warnings (new ones prefixed by >>):

   sound/soc/codecs/lpass-tx-macro.c: In function 'tx_macro_tx_hpf_corner_freq_callback':
>> sound/soc/codecs/lpass-tx-macro.c:656:6: warning: variable 'adc_reg' set but not used [-Wunused-but-set-variable]
     656 |  u16 adc_reg;
         |      ^~~~~~~


vim +/adc_reg +656 sound/soc/codecs/lpass-tx-macro.c

   647	
   648	static void tx_macro_tx_hpf_corner_freq_callback(struct work_struct *work)
   649	{
   650		struct delayed_work *hpf_delayed_work;
   651		struct hpf_work *hpf_work;
   652		struct tx_macro *tx;
   653		struct snd_soc_component *component;
   654		u16 dec_cfg_reg, hpf_gate_reg;
   655		u8 hpf_cut_off_freq;
 > 656		u16 adc_reg;
   657	
   658		hpf_delayed_work = to_delayed_work(work);
   659		hpf_work = container_of(hpf_delayed_work, struct hpf_work, dwork);
   660		tx = hpf_work->tx;
   661		component = tx->component;
   662		hpf_cut_off_freq = hpf_work->hpf_cut_off_freq;
   663	
   664		dec_cfg_reg = CDC_TXn_TX_PATH_CFG0(hpf_work->decimator);
   665		hpf_gate_reg = CDC_TXn_TX_PATH_SEC2(hpf_work->decimator);
   666	
   667		if (is_amic_enabled(component, hpf_work->decimator)) {
   668			adc_reg = CDC_TX_INP_MUX_ADC_MUXn_CFG0(hpf_work->decimator);
   669			snd_soc_component_write_field(component,
   670					dec_cfg_reg,
   671					CDC_TXn_HPF_CUT_FREQ_MASK,
   672					hpf_cut_off_freq);
   673			snd_soc_component_update_bits(component, hpf_gate_reg,
   674						      CDC_TXn_HPF_F_CHANGE_MASK |
   675						      CDC_TXn_HPF_ZERO_GATE_MASK,
   676						      0x02);
   677			snd_soc_component_update_bits(component, hpf_gate_reg,
   678						      CDC_TXn_HPF_F_CHANGE_MASK |
   679						      CDC_TXn_HPF_ZERO_GATE_MASK,
   680						      0x01);
   681		} else {
   682			snd_soc_component_write_field(component, dec_cfg_reg,
   683						      CDC_TXn_HPF_CUT_FREQ_MASK,
   684						      hpf_cut_off_freq);
   685			snd_soc_component_write_field(component, hpf_gate_reg,
   686						      CDC_TXn_HPF_F_CHANGE_MASK, 0x1);
   687			/* Minimum 1 clk cycle delay is required as per HW spec */
   688			usleep_range(1000, 1010);
   689			snd_soc_component_write_field(component, hpf_gate_reg,
   690						      CDC_TXn_HPF_F_CHANGE_MASK, 0x0);
   691		}
   692	}
   693	

---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
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