[PATCH v3 01/10] Add auxiliary bus support

[Parav Pandit]

> From: Ertman, David M <david.m.ertman at intel.com>
> Sent: Friday, November 6, 2020 12:58 AM
> Subject: RE: [PATCH v3 01/10] Add auxiliary bus support
> 
> > -----Original Message-----
> > From: Dan Williams <dan.j.williams at intel.com>
> > Sent: Thursday, November 5, 2020 1:19 AM
> >

[..]
> > > +
> > > +Another use case is for the PCI device to be split out into
> > > +multiple sub functions.  For each sub function an auxiliary_device
> > > +will be created.  A PCI sub function driver will bind to such
> > > +devices that will create its own one or more class devices.  A PCI
> > > +sub function auxiliary device will likely be contained in a struct
> > > +with additional attributes such as user defined sub function number
> > > +and optional attributes such as resources and a link to
> > the
> > > +parent device.  These attributes could be used by systemd/udev; and
> > hence should
> > > +be initialized before a driver binds to an auxiliary_device.
> >
> > This does not read like an explicit example like the previous 2. Did
> > you have something specific in mind?
> >
> 
> This was added by request of Parav.
> 
This example describes the mlx5 PCI subfunction use case.
I didn't follow your question about 'explicit example'.
What part is missing to identify it as explicit example?