[alsa-devel] [PATCH 1/6] ASoC: cs42xx8: Mark chip ID as volatile and remove cache bypass

[Charles Keepax]

On Mon, Oct 24, 2016 at 04:33:42PM +0100, Mark Brown wrote:
> On Mon, Oct 24, 2016 at 10:55:44AM +0100, Charles Keepax wrote:
> > Rather than manually enabling cache bypass when reading the ID registers
> > simply mark them as volatile. The old code worked this is simply the
> > more standard way to implement this. There is a comment included in the
> 
> Even better just remove the register default, with rbtree regmap will do
> the read and then cache it - no need to mark as volatile.

:-) well if we are preferring that then some of the series can
just be dropped, as they were changing exactly that to be
explicitly marked volatile.

I will fixup the remaining patches and resend.

Thanks,
Charles