[alsa-devel] [PATCH 4/7] ASoC: Intel: Skylake: Add MCLK configuration

Vinod Koul vinod.koul at intel.com
Tue Feb 9 03:45:27 CET 2016


On Mon, Feb 08, 2016 at 04:43:04PM +0000, Mark Brown wrote:
> On Fri, Feb 05, 2016 at 12:19:07PM +0530, Vinod Koul wrote:
> > From: "Dharageswari.R" <dharageswari.r at intel.com>
> > 
> > The SoC has MCLK output which is typically required by codecs.
> > The MCLK is controlled by DSP FW, so driver can configure that by
> > sending DMA_CONTROL IPC. The configuration for MCLK is present
> > in the endpoint blob.
> 
> For integration with CODEC drivers this clock should really be exposed
> via the clock API too.

Ideally yes.

I think then the our driver should register as a clock provider too. I will
check and see how we can get this done

Thanks
-- 
~Vinod
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