[alsa-devel] [PATCH] ASoC: Document DAI signal polarity

[Benoît Thébaudeau]

Hi,

On Wed, Sep 30, 2015 at 9:08 PM, Anatol Pomozov
<anatol.pomozov at gmail.com> wrote:
> Hi
>
> On Wed, Sep 30, 2015 at 11:10 AM, Mark Brown <broonie at kernel.org> wrote:
>> I don't think that's true, the expectation is that a left/right sample
>> pair is time aligned so the left channel is definitely the start of
>> frame for all meaningful purposes.  It's certainly what I'd expect most
>> people to understand - choosing a counterintuitive definition to make
>> this one statement convenient is going to lead to constant confusion for
>> the mode which is clearest.
>
> To clarify, you propose following definition of normal FSYNC polarity:
>  - for I2S/left/right justified - frame starts with falling FSYNC edge
>  - for DSP A/B - frame starts with rising edge of FSYNC edge (plus offset)
>  - for AC97 my guess it is the same as DSP - frame starts with rising
> FSYNC edge.
>
> Is it correct?

Most CODEC datasheets describe the regular left/right justified
formats as having the left channel starting on the rising edge of
FSYNC, like for DSP A/B and AC'97. I²S is the only exception here.

Best regards,
Benoît