[alsa-devel] [PATCH 01/10] irqchip: irq-mips-gic: export gic_send_ipi

[Qais Yousef]

On 08/28/2015 03:22 PM, Thomas Gleixner wrote:
> On Fri, 28 Aug 2015, Qais Yousef wrote:
>> Thanks a lot for the detailed explanation. I wasn't looking for a quick and
>> dirty solution but my view of the problem is much simpler than yours so my
>> idea of a solution would look quick and dirty. I have a better appreciation of
>> the problem now and a way to approach it :-)
>>
>>  From DT point of view are we OK with this form then
>>
>>      coprocessor {
>>              interrupt-source = <&intc INT_SPEC COP_HWAFFINITY>;
>>              interrupt-sink = <&intc INT_SPEC CPU_HWAFFINITY>;
>>      }
>>
>> and if the root controller sends normal IPI as it sends normal device
>> interrupts then interrupt-sink can be a standard interrupts property (like in
>> my case)
>>
>>      coprocessor {
>>              interrupt-source = <&intc INT_SPEC COP_HWAFFINITY>;
>>              interrupts = <INT_SPEC>;
>>      }
>>
>> Does this look right to you? Is there something else that needs to be covered
>> still?
> I'm not an DT wizard. I leave that to the DT experts.
>   

Hi Marc Zyngier, Mark Rutland,

Any comments about the DT binding for the IPIs?

To recap, the proposal which is based on Marc Zyngier's is to use 
interrupt-source to represent an IPI from Linux CPU to a coprocessor and 
interrupt-sink to receive an IPI from coprocessor to Linux CPU. 
Hopefully the description above is self explanatory. Please let me know 
if you need more info. Thomas covered the routing, synthesising, and 
requesting parts in the core code. The remaining (high level) issue is 
how to describe the IPIs in DT.

Thanks,
Qais