[alsa-devel] [PATCH 1/2] ASoC: Intel:Add Cherrytrail & Braswell machine driver cht_bsw_rt5645

Mark Brown broonie at kernel.org
Mon Feb 2 20:05:21 CET 2015


On Sat, Jan 31, 2015 at 03:22:39PM -0800, yang.a.fang at intel.com wrote:

> +	/* Select clk_i2s1_asrc as ASRC clock source */
> +	snd_soc_write(codec, RT5645_ASRC_2, 0x1111);

We should have an interface for doing this from the CODEC driver rather
than just randomly writing directly to registers - that way we don't
have something else working behind the back of the CODEC driver and
potentially interfering with it.
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