[alsa-devel] twl4030 latency update
peter.ujfalusi at ti.com
Fri Mar 21 08:08:58 CET 2014
On 03/20/2014 04:31 PM, Leonardo Gabrielli wrote:
> Dear Peter,
> thanks, I'm not sure I understand all the details but after a fast find in my
> beagleboard /sys I found
> All of these are already set as threshold:
> cat sys/devices/68000000.ocp/49022000.mcbsp/dma_op_mode
> [element] threshold
it is in 'element' mode, the  shows the selected mode.
You can change it:
echo threshold > /sys/devices/68000000.ocp/49022000.mcbsp/dma_op_mode
> Probably I found the FIFOs to be shortened in order to reduce latency: all of
> the thresholds are 112 besides one of the devices which has:
> cat sys/devices/68000000.ocp/49022000.mcbsp/max_rx_thres
> for both tx and rx. Maybe that's the ALSA playback samples queue.
This is for the threshold mode. With this value you can set the maximum slots
you want to use in the McBSP FIFO.
To change it:
echo 320 > /sys/devices/68000000.ocp/49022000.mcbsp/max_tx_thres
echo 320 > /sys/devices/68000000.ocp/49022000.mcbsp/max_ex_thres
At the end with this value you can limit the sDMA burst sizes and the McBSP
FIFO level. The threshold means: generate DMA request if threshold number of
slots are free in the FIFO (playback) or when threshold amount of data
available in the FIFO (capture).
> In fact I find:
> cat /proc/device-tree/ocp/mcbsp\@49022000/ti\,hwmods
> So it's the McBSP2 which you mentioned.
> Now, I'm not sure how to change the threshold, I guess I have to patch some
> kernel module and rebuild?
No, you do not need to recompile anything. See my previous comment.
> On 20/03/2014 14:35, Peter Ujfalusi wrote:
>> Hi Leonardo,
>> On 03/20/2014 01:13 PM, Leonardo Gabrielli wrote:
>>> Dear Peter,
>>> I was investigating on TWL4030 high playback latency and stumbled in an old
>>> thread started by Edgar
>>> where I read this is related to McBSP2 buffer length
>>> Recent kernels seems to have the same behavior (I have a debian beagleboardxM
>>> with 3.13.3-armv7-x10)
>>> Did you manage to get a fix to this problem? Would it be possible?
>> The 'misusing/configuring the McBSP, and sDMA' did not worked :(
>> However the mcbsp code went through quite a bit of change since than
>> concerning the McBSP FIFO/sDMA configuration.
>> If we have FIFO the sDMA is always in packet mode.
>> The default is to transfer one sample with sDMA per DMA request.
>> You can switch the McBSP to 'threshold' mode and set the maximum FIFO
>> threshold you want to use. The code will figure out the optimal FIFO/burst
>> size based on the period size and the max threshold you have set.
>> This is done via a sysfs file under the mcbsp, the file is dma_op_mode if I
>> recall correctly.
>> Playing with the max tx/rx threshold you might be able to get better latency.
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