[alsa-devel] [PATCH] [15/29] ALSA: dice: avoid superflous write at bus reset

Clemens Ladisch clemens at ladisch.de
Mon Oct 21 21:29:20 CEST 2013


When a bus reset happens, the enable register is automatically cleared,
so we do not need to clear it manually when stopping the stream.

Signed-off-by: Clemens Ladisch <clemens at ladisch.de>
---
 sound/firewire/dice.c |    5 +++++
 1 file changed, 5 insertions(+)

diff --git a/sound/firewire/dice.c b/sound/firewire/dice.c
index 59d5ca4..cfa98a8 100644
--- a/sound/firewire/dice.c
+++ b/sound/firewire/dice.c
@@ -246,6 +246,9 @@ static void dice_enable_clear(struct dice *dice)
 {
 	__be32 value;

+	if (!dice->global_enabled)
+		return;
+
 	value = 0;
 	snd_fw_transaction(dice->unit, TCODE_WRITE_QUADLET_REQUEST,
 			   global_address(dice, GLOBAL_ENABLE),
@@ -1009,6 +1012,8 @@ static void dice_bus_reset(struct fw_unit *unit)
 	 * manner.
 	 */
 	amdtp_out_stream_pcm_abort(&dice->stream);
+
+	dice->global_enabled = false;
 	dice_stream_stop_packets(dice);

 	dice_owner_update(dice);


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