[alsa-devel] [RFC PATCH 07/11] dmaengine: PL08x: Fix reading the byte count in cctl

Russell King - ARM Linux linux at arm.linux.org.uk
Mon Jun 17 21:03:37 CEST 2013

On Mon, Jun 17, 2013 at 03:53:14PM +0200, Linus Walleij wrote:
> On Sun, Jun 16, 2013 at 10:54 PM, Tomasz Figa <tomasz.figa at gmail.com> wrote:
> > From: Alban Bedel <alban.bedel at avionic-design.de>
> >
> > There are more fields than just SWIDTH in CH_CONTROL register, so read
> > register value must be masked in addition to shifting.
> >
> > Signed-off-by: Alban Bedel <alban.bedel at avionic-design.de>
> > Signed-off-by: Tomasz Figa <tomasz.figa at gmail.com>
> Acked-by: Linus Walleij <linus.walleij at linaro.org>
> Are we just lucky on current variants such that all unmasked bits
> happen to be zero on them?

It's probably that all the places which this gets used, the transfers
are 8-bit (like the UART) so it "just works" irrespective of that.

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