[alsa-devel] [PATCH v2 3/3] ASoC: sglt5000: Fix SGTL5000_PLL_FRAC_DIV_MASK

Mark Brown broonie at kernel.org
Fri Jul 5 11:46:18 CEST 2013

On Thu, Jul 04, 2013 at 08:01:03PM -0300, Fabio Estevam wrote:
> From: Fabio Estevam <fabio.estevam at freescale.com>
> SGTL5000_PLL_FRAC_DIV_MASK is used to mask bits 0-10 (11 bits in total) of
> register CHIP_PLL_CTRL, so fix the mask to accomodate all this bit range.

Applied, thanks.
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