[alsa-devel] Query on Audio DMA using DMAEngine
joelf at ti.com
Wed Jul 3 19:55:36 CEST 2013
Copying some more lists are we're also discussing the DMA controller in the
On 07/03/2013 04:43 AM, Mark Brown wrote:
> On Wed, Jul 03, 2013 at 11:09:22AM +0200, Lars-Peter Clausen wrote:
>> On 07/02/2013 02:13 PM, Mark Brown wrote:
>>> This sort of cyclic thing tends to be best, ideally you don't need
>>> interrupts at all (other than a timer).
>> Yes, this is usually how it is done. But I'm wondering maybe the EDMA
>> controller only has a small total amount of slots available.
> Well, you don't need particularly many slots so long as you can cope
> with a large period size.
When would it not be possible to cope with a large period size? Are there any
guidelines on what to consider when fixing a period size?
I see tegra and aux1x go upto .period_bytes_min = 1024
About slots, following are no.of slots on some SoCs with EDMA:
am1808 - 96 slots available + 32 taken up for channel but can be reused with
am335x - 172 slots available + 64 taken up for channels
On a slightly different note, about buffer_bytes_max, is there any drawback to
setting it to a smaller value? Currently 128K is about what is used on davinci-pcm.
My idea is to map to do the direct mapping to IRAM if the IRAM transfers are
really what are preventing the under runs, but 128K will be too much for the
buffer as we don't have that much IRAM infact it is just the boundary on am33xx
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