[alsa-devel] [PATCH 09/11] ARM: imx6q: add ssi1 clk_lookup
richard.zhao at freescale.com
Wed May 2 12:34:41 CEST 2012
On Mon, Apr 30, 2012 at 02:18:57PM +0200, Sascha Hauer wrote:
> On Mon, Apr 30, 2012 at 10:01:46AM +0800, Richard Zhao wrote:
> > > > >
> > > > > clk_register_clkdev(clk[ipg], "ipg", "2028000.ssi");
> > > > ssi don't have ipg gate. We can let it always on for imx6q.
> > >
> > > Can you please ask your IC guys for clarification?
> > >
> > > For example on i.MX5 we have a ssi ipg clock and a ssi serial clock.
> > > Both can be gated with two individual gate bits.
> > >
> > > The i.MX6 datasheet (and also several other i.MX datasheets) is quite
> > > nebulous. The i.MX6 has only one gate bit for each SSI unit, but
> > > it's not clear if this bit actually gates both the ipg and serial
> > > clock or only one of them.
> > You're right. ipg and serial clocks share the same gate. How do we
> > handle it? I think it's not the only one and won't be last one.
> We don't have support for a single gate gating two clocks right now and
> I don't know how this fits into the clock framework.
> We could pretend that only the ipg clock is gateable because this is
> needed anyway when the SSI unit is used.
Shawn, will you add clk ssi_ipg?
> It seems we need a proper solution for this later.
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