[alsa-devel] [PATCH 1/2] ASoC: cs42l51: Clear CS42L51_MIC_POWER_CTL_AUTO bit for MODE_SLAVE and MODE_MASTER

Mark Brown broonie at opensource.wolfsonmicro.com
Wed Nov 23 12:50:19 CET 2011


On Wed, Nov 23, 2011 at 12:44:45PM +0800, Axel Lin wrote:

> Enables the auto-detect circuitry for detecting the speed mode
> of the CODEC when operating as a slave.
> When AUTO is enabled, the MCLK/LRCK ratio must be implemented
> according to Table 3 on page 39. The
> SPEED[1:0] bits are ignored when this bit is enabled.
> Speed is determined by the MCLK/LRCK ratio.

> SPEED[1:0] bits are ignored when this bit is enabled.
> Thus we need to clear this bit for MODE_SLAVE and MODE_MASTER
> because the default of this bit is 1 (Enable).

It's not clear to me that putting the device into manual mode is the
best thing here - if the device can figure things out automatically it
seems like from a defensiveness point of view it'd be better to let it
do that.  According to the above it'll ignore the setting in the
register in slave mode so there's no harm in setting it (and it
simplifies the code) but I don't see a pressing need to actually pay
attention to it if we don't have to.


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