[alsa-devel] [PATCH 2/2] hda - delayed ELD repoll

Wu Fengguang fengguang.wu at intel.com
Wed Nov 16 03:48:06 CET 2011

On Wed, Nov 16, 2011 at 02:25:00AM +0800, Stephen Warren wrote:
> Wu Fengguang wrote at Tuesday, November 15, 2011 7:33 AM:
> > The Intel HDMI chips (ironlake at least) are found to have ~250ms delay
> > between the ELD_Valid=1 hotplug event is send and the ELD buffer becomes
> > actually readable. During the time the ELD buffer is mysteriously all 0.
> > 
> > Fix it by scheduling a delayed work to re-read ELD buffer after 300ms.
> Any idea why; is the graphics driver writing the ELD data to the audio HW
> after triggering the unsolicited even rather than before, or something
> like that?

Nope. The graphics driver is doing

        eld_valid = 0
        write to eld buffer
        eld_valid = 1

> 250mS almost sounds like it's setting ELDV in the audio HW,
> then going and reading the EDID, then writing the EDID to the audio HW;
> perhaps the graphics driver is accidentally setting PRESENT+ELDV when it's
> meant to be setting just PRESENT, and later setting ELDV?

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