[alsa-devel] [PATCH] ASoC: soc-core: Add support for NULL default register caches

Timur Tabi timur at freescale.com
Mon Jan 10 23:40:00 CET 2011

Mark Brown wrote:
> You've not identified what the issue is with the above?  Is it just that
> nothing else ensured the cache was set up (eg, by doing reads from the
> hardware)?

The CS4270 registers are numbered from 1 through 8, so codec_reg should look
like this:

 1:   c3
 2:    0
 3:   30
 4:    0
 5:    0
 6:    0
 7:    0
 8:    0

What I don't know is why the bad output, but it's probably because the register
cache code broke during the various changes applied to it since multi-component
was introduced.  Originally, the driver handled the register cache completely
internally.  Then, as register caching was added to ASoC itself, the driver was
modified to use it.  I believe that those modifications were not really tested.

And since I removed all that code for my patch, I'm not really inclined to go
back and see what specifically was wrong with it.

Timur Tabi
Linux kernel developer at Freescale

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