[alsa-devel] [PATCH v2 4/5] ASoC: add spi hw read function for 16 addr 8 data mode

Scott Jiang scott.jiang.linux at gmail.com
Mon Aug 15 09:03:33 CEST 2011

2011/8/15 Barry Song <21cnbao at gmail.com>:
> 2011/8/13 Scott Jiang <scott.jiang.linux at gmail.com>:
>> some spi registers are 7bits global address + 1 bit r/w + 8 bits
>> register address. soc cache layer can't support this kind well.
>> so let codec driver read registers directly.
> i don't think your this document has any relationship with your patch.
> it is just making confusion.
> And who is the user of your this new API?
some spi codecs such as ad1938 can't be supported by cache layer. so
they need spi hw read function.
This patch add this function for 16bits addr 8 bits data mode spi transfer.

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