[alsa-devel] [PATCH 1/1] ASoC: core: cache index fix

Dong Aisheng-B29396 B29396 at freescale.com
Wed Aug 3 09:03:54 CEST 2011

> -----Original Message-----
> From: Mark Brown [mailto:broonie at opensource.wolfsonmicro.com]
> Sent: Wednesday, August 03, 2011 1:24 PM
> To: Takashi Iwai
> Cc: Dong Aisheng-B29396; alsa-devel at alsa-project.org;
> s.hauer at pengutronix.de; lrg at ti.com; linux-arm-kernel at lists.infradead.org;
> w.sang at pengutronix.de
> Subject: Re: [alsa-devel] [PATCH 1/1] ASoC: core: cache index fix
> On Tue, Aug 02, 2011 at 08:06:23PM +0200, Takashi Iwai wrote:
> > example.  So, alternatively, we can put the condition in some generic
> > filter function like readable/writeble things.
> Yes, I suggested that already, these are just unreadable and unwritable
> registers :/

For padded cache array, the unreadable & unwritable function is correct
as Takashi indicated accessing the odd number of register index is invalid with
step = 2.
But for packed cache array...

There's a few confuse on the using of reg_cache_size and reg_cache_step
in current kernel. 
(like some drivers use packed cache while some use padded)

Maybe we need to first unify it.

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