[alsa-devel] snd-soc-pxa-ssp I2C/FIFO issues

Daniel Mack daniel at caiaq.de
Mon Mar 9 17:16:01 CET 2009

On Mon, Mar 09, 2009 at 03:03:06PM +0000, Liam Girdwood wrote:
> On Mon, 2009-03-09 at 15:47 +0100, pHilipp Zabel wrote:
> > Ok,
> > 
> > I'm not sure how to handle this correctly.
> > 
> > Magician needs stereo S16_LE input data from alsa, DAIFMT_DSP_A on the
> > wire with a frame size of 16 bit (one frame for each channel) and thus
> > 2-byte DMA transfers to the FIFO (currently called 'mono' DMA params).
> > Zylonite's current code uses 32 bit frame size and 4-byte DMA
> > transfers to emulate I2S (S16_LE,stereo). Network mode seems to work,
> > so it could be changed to use two 16 bit slots instead with 2-byte DMA
> > transfers (which would make Magician happy). But...
> > Daniel's board needs very strange settings because network mode
> > doesn't work, so I guess he can't use 2-byte DMA transfers. Is that
> > correct?
> > 
> > If we can't find a way to have all machines use the mono DMA params,
> > there has to be some kind of interface to set the width of the data in
> > the FIFO independently from the Alsa format. How should that interface
> > look like?
> Btw, what pxa processor variants are you and Daniel using ?

PXA300 in my case.

> Iirc, PXA3x SSP is quite different in terms of "usability" compared to
> to PXA2x SSP. It might be worth diverging the SSP code a little here if
> your CPUs are different.

The SSP registers are indeed different (or at least PXA3xx has features
PXA2xx lacks), so it could be we end up with some special cases for the
format I described in my other mail. Maybe PXA2xx's SSPs won't support
that format at all or the need some special treatmeant with other
register magic to be found out by more nasty trial-and-error.

My plan is to only conditionally support that format my board needs for
PXA3s now until someone finds some time to test that on a different
processor. Now the only remaining question is how to pass that
information to the CPU DAI ;)


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