[alsa-devel] asoc: s3c24xx+uda1380 - some questions

Vasily Khoruzhick anarsoul at gmail.com
Tue Feb 3 00:46:32 CET 2009

On Tuesday 27 January 2009 22:32:11 Vasily Khoruzhick wrote:
> On 27 January 2009 21:49:01 pHilipp Zabel wrote:
> > The uda1380 data sheet says that the reset time should be at least 1
> > µs - could that be a problem?
> >
> > regards
> > Philipp
> Nope, added mdelay(10) in reset sequence, but it didn't help.
> Regards
> Vasily

Here's patch that fixes 2nd bug I've mentioned (there's a sound only on second 
and later aplay). It's bug in uda1380 driver (probably, just a typo), driver 
switches to WSPLL in uda1380_pcm_prepare even if SYSCLK was chosen 
(uda1380_pcm_prepare modifies UDA1380_CLK register before flushing reg cache, 
but doesn't restore its value later)

One more question: it seems that my rx1950 clocked in a way that I can't get 
precise divisor for 44100 and 22050 rates, but uda1380 driver propose them 
(look UDA1380_RATES define and struct snd_soc_dai uda1380_dai[].
How to exclude all rates except 16000 and 48000? Should I declare my own 
snd_soc_dai and copy necessary members from uda1380's one?

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