[alsa-devel] [PATCH] ASoC: correct s6000 I2S clock polarity

Mark Brown broonie at opensource.wolfsonmicro.com
Mon Apr 6 12:23:42 CEST 2009

On Mon, Apr 06, 2009 at 11:50:22AM +0200, Daniel Glöckner wrote:
> According to the data sheet data is clocked out on the falling edge
> and latched on the rising edge of the bit clock. While the left sample
> is transmitted the word clock line is low.

> Signed-off-by: Daniel Glöckner <dg at emlix.com>

Applied, thanks!

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