[alsa-devel] (SoC) Does i.MX27's SSI work as I2S clock master?

Liam Girdwood lrg at kernel.org
Wed Nov 26 09:34:46 CET 2008

On Tue, 2008-11-25 at 20:27 +0000, Mark Brown wrote:
> On Wed, Nov 26, 2008 at 04:54:11AM +0900, ngc at drvlabo.jp wrote:
> > Then, I'm trying to play sounds via WM8728 and
> > have not hear any sounds yet.
> > I checked SSI-3 signal set with an oscilloscope,
> > no clock signal appears on SSI3_CLK.
> > I tried the various SSI setting, I2S normal, I2S master,
> > asychronous/synchronous, normal mode/network mode, ...
> > But, I can't see clock signal, yet.
> Is it just SSI3_CLK that produces no output or do you also see nothing
> on the I2S bit clock, frame sync and data signals?
> > I want to know an example setting to act i.MX' SSI as I2S clock master.
> I'm not aware of any public examples of i.MX code other than what is in
> the ASoC git repository and the Freescale BSPs, and the only example I
> can see in ASoC git is for i.MX31.

It's probably also worth checking your AUDMUX settings wrt to SSI clock
source and direction, SSI controller clock and SSI GPIO's.


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