[alsa-devel] ALSA vs. non coherent DMA

Grant Likely grant.likely at secretlab.ca
Wed May 7 17:44:01 CEST 2008

On Wed, May 7, 2008 at 8:22 AM, Timur Tabi <timur at freescale.com> wrote:
> Takashi Iwai wrote:
>  > This is a mmap of the data record to be shared in realtime with apps.
>  > The app updates its data pointer (appl_ptr) on the mmapped buffer
>  > while the driver updates the data (e.g. DMA position, called hwptr) on
>  > the fly on the mmapped record.  Due to its real-time nature, it has to
>  > be coherent -- at least, it was a problem on ARM.
>  This doesn't sound like a coherency problem to me, and least not one you'd find
>  on PowerPC.  Both the driver and the application run on the host CPU, so there
>  shouldn't be any coherency problem.  My understanding is that a "non coherent"
>  platform is one where the host CPU isn't aware when a *hardware device* writes
>  directly to memory, e.g. via DMA.

IIRC, some ARMs have a different situation because the dcache is
virtually instead of physically tagged.  Therefore, the kernel mapping
may not see data that has not been flushed out of the user space
mappings.  (Someone please correct me if I'm wrong).


Grant Likely, B.Sc., P.Eng.
Secret Lab Technologies Ltd.

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